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| author | Yinghai Lu <yinghai@kernel.org> | 2013-01-25 00:19:53 +0400 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2013-01-30 03:20:13 +0400 |
| commit | 6b9c75aca6cba4d99a6e8d8274b1788d4d4b50d9 (patch) | |
| tree | 14ced936eace998f2ad86ab10573ed198ff955d2 /arch/x86/mm/init_64.c | |
| parent | 8170e6bed465b4b0c7687f93e9948aca4358a33b (diff) | |
| download | linux-6b9c75aca6cba4d99a6e8d8274b1788d4d4b50d9.tar.xz | |
x86, 64bit: #PF handler set page to cover only 2M per #PF
We only map a single 2 MiB page per #PF, even though we should be able
to do this a full gigabyte at a time with no additional memory cost.
This is a workaround for a broken AMD reference BIOS (and its
derivatives in shipping system) which maps a large chunk of memory as
WB in the MTRR system but will #MC if the processor wanders off and
tries to prefetch that memory, which can happen any time the memory is
mapped in the TLB.
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Link: http://lkml.kernel.org/r/1359058816-7615-13-git-send-email-yinghai@kernel.org
Cc: Alexander Duyck <alexander.h.duyck@intel.com>
[ hpa: rewrote the patch description ]
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'arch/x86/mm/init_64.c')
0 files changed, 0 insertions, 0 deletions