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| author | Will Deacon <will.deacon@arm.com> | 2018-12-13 16:47:38 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-09-21 08:17:15 +0300 |
| commit | f35f5a990a07133b29a9d92ec06b7ccdf4fd5067 (patch) | |
| tree | bed589d2d6bb9cef0d6f989c13363fd80b2182c8 /arch/x86/lib/error-inject.c | |
| parent | c0ccb4da26bc9eca366f2a437b9d35a749fdde15 (diff) | |
| download | linux-f35f5a990a07133b29a9d92ec06b7ccdf4fd5067.tar.xz | |
arm64: kpti: Whitelist Cortex-A CPUs that don't implement the CSV3 field
commit 2a355ec25729053bb9a1a89b6c1d1cdd6c3b3fb1 upstream.
While the CSV3 field of the ID_AA64_PFR0 CPU ID register can be checked
to see if a CPU is susceptible to Meltdown and therefore requires kpti
to be enabled, existing CPUs do not implement this field.
We therefore whitelist all unaffected Cortex-A CPUs that do not implement
the CSV3 field.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Cc: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/x86/lib/error-inject.c')
0 files changed, 0 insertions, 0 deletions