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| author | Sandipan Das <sandipan.das@amd.com> | 2022-08-11 15:29:53 +0300 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2022-08-27 01:05:43 +0300 |
| commit | 703fb765f48897214e3eb110f35dddec80682f60 (patch) | |
| tree | f23cd920b092433d819d3fa160d540cfd0129f18 /arch/x86/include/asm/perf_event.h | |
| parent | 257449c6a50298bd21dcabd644f66a0296b78532 (diff) | |
| download | linux-703fb765f48897214e3eb110f35dddec80682f60.tar.xz | |
perf/x86/amd/lbr: Detect LbrExtV2 support
AMD Last Branch Record Extension Version 2 (LbrExtV2) is driven by Core PMC
overflows. It records recently taken branches up to the moment when the PMC
overflow occurs.
Detect the feature during PMU initialization and set the branch stack depth
using CPUID leaf 0x80000022 EBX.
Signed-off-by: Sandipan Das <sandipan.das@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/fc6e45378ada258f1bab79b0de6e05c393a8f1dd.1660211399.git.sandipan.das@amd.com
Diffstat (limited to 'arch/x86/include/asm/perf_event.h')
| -rw-r--r-- | arch/x86/include/asm/perf_event.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h index f6fc8dd51ef4..9ac46dbe57d4 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h @@ -207,7 +207,8 @@ union cpuid_0x80000022_ebx { struct { /* Number of Core Performance Counters */ unsigned int num_core_pmc:4; - unsigned int reserved:6; + /* Number of available LBR Stack Entries */ + unsigned int lbr_v2_stack_sz:6; /* Number of Data Fabric Counters */ unsigned int num_df_pmc:6; } split; |