diff options
| author | Kan Liang <kan.liang@linux.intel.com> | 2020-07-23 20:11:12 +0300 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2020-08-18 17:34:36 +0300 |
| commit | 0e2e45e2ded4988f5641115fd996c75dc32e4be3 (patch) | |
| tree | 86090dd85afbbac4faf9dd09b1a79325037a5cb5 /arch/x86/include/asm/perf_event.h | |
| parent | 7b2c05a15d29d0570a0d21da1e4fd5cbc85cbf13 (diff) | |
| download | linux-0e2e45e2ded4988f5641115fd996c75dc32e4be3.tar.xz | |
perf/x86: Add a macro for RDPMC offset of fixed counters
The RDPMC base offset of fixed counters is hard-code. Use a meaningful
name to replace the magic number to improve the readability of the code.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20200723171117.9918-10-kan.liang@linux.intel.com
Diffstat (limited to 'arch/x86/include/asm/perf_event.h')
| -rw-r--r-- | arch/x86/include/asm/perf_event.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/x86/include/asm/perf_event.h b/arch/x86/include/asm/perf_event.h index 000cab7818b5..964ba312c249 100644 --- a/arch/x86/include/asm/perf_event.h +++ b/arch/x86/include/asm/perf_event.h @@ -196,6 +196,9 @@ struct x86_pmu_capability { * Fixed-purpose performance events: */ +/* RDPMC offset for Fixed PMCs */ +#define INTEL_PMC_FIXED_RDPMC_BASE (1 << 30) + /* * All the fixed-mode PMCs are configured via this single MSR: */ |