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| author | Borislav Petkov <bp@suse.de> | 2017-01-20 23:29:42 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2017-01-23 12:02:45 +0300 |
| commit | 0c12d18ab96e4da9f3e963bc242689bdeaaf2330 (patch) | |
| tree | 8f9f4df441f2f55952be27e577b4139243354a96 /arch/x86/include/asm/microcode.h | |
| parent | a585df8edabdb47ae25214ebb3a627ca7ce800d3 (diff) | |
| download | linux-0c12d18ab96e4da9f3e963bc242689bdeaaf2330.tar.xz | |
x86/microcode: Convert to bare minimum MSR accessors
Having tracepoints to the MSR accessors makes them unsuitable for early
microcode loading: think 32-bit before paging is enabled and us chasing
pointers to test whether a tracepoint is enabled or not. Results in a
reliable triple fault.
Convert to the bare ones.
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: http://lkml.kernel.org/r/20170120202955.4091-4-bp@alien8.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/x86/include/asm/microcode.h')
| -rw-r--r-- | arch/x86/include/asm/microcode.h | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h index 38711df3bcb5..90b22bbdfce9 100644 --- a/arch/x86/include/asm/microcode.h +++ b/arch/x86/include/asm/microcode.h @@ -7,18 +7,17 @@ #define native_rdmsr(msr, val1, val2) \ do { \ - u64 __val = native_read_msr((msr)); \ + u64 __val = __rdmsr((msr)); \ (void)((val1) = (u32)__val); \ (void)((val2) = (u32)(__val >> 32)); \ } while (0) #define native_wrmsr(msr, low, high) \ - native_write_msr(msr, low, high) + __wrmsr(msr, low, high) #define native_wrmsrl(msr, val) \ - native_write_msr((msr), \ - (u32)((u64)(val)), \ - (u32)((u64)(val) >> 32)) + __wrmsr((msr), (u32)((u64)(val)), \ + (u32)((u64)(val) >> 32)) struct ucode_patch { struct list_head plist; |