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authorHuang Ying <ying.huang@intel.com>2009-07-31 05:41:40 +0400
committerH. Peter Anvin <hpa@zytor.com>2009-08-11 00:58:27 +0400
commit5b7e88edc6193f36941bccbfd5ed9ed5fe27d2e1 (patch)
tree2f2cb2ab05cef96bae484d829bef19e925961f52 /arch/x86/include/asm/mce.h
parentf3a0867b12e0cf1512c0bd0665f2339fc75ed2a8 (diff)
downloadlinux-5b7e88edc6193f36941bccbfd5ed9ed5fe27d2e1.tar.xz
x86, mce: Support specifying context for software mce injection
The cpu context is specified via the new mce.inject_flags fields. This allows more realistic machine check testing in different situations. "RANDOM" context is implemented via NMI broadcasting to add randomization to testing. AK: Fix NMI broadcasting check. Fix 32-bit building. Some race fixes. Move to module. Various changes ChangeLog: v3: - Re-based on latest x86-tip.git/mce4 - Fix 32-bit building v2: - Re-base on latest x86-tip.git/mce3 Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Diffstat (limited to 'arch/x86/include/asm/mce.h')
-rw-r--r--arch/x86/include/asm/mce.h11
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/x86/include/asm/mce.h b/arch/x86/include/asm/mce.h
index ad7535372918..8945be9ad2b1 100644
--- a/arch/x86/include/asm/mce.h
+++ b/arch/x86/include/asm/mce.h
@@ -38,6 +38,13 @@
#define MCM_ADDR_MEM 3 /* memory address */
#define MCM_ADDR_GENERIC 7 /* generic */
+#define MCJ_CTX_MASK 3
+#define MCJ_CTX(flags) ((flags) & MCJ_CTX_MASK)
+#define MCJ_CTX_RANDOM 0 /* inject context: random */
+#define MCJ_CTX_PROCESS 1 /* inject context: process */
+#define MCJ_CTX_IRQ 2 /* inject context: IRQ */
+#define MCJ_NMI_BROADCAST 4 /* do NMI broadcasting */
+
/* Fields are zero when not available */
struct mce {
__u64 status;
@@ -48,8 +55,8 @@ struct mce {
__u64 tsc; /* cpu time stamp counter */
__u64 time; /* wall time_t when error was detected */
__u8 cpuvendor; /* cpu vendor as encoded in system.h */
- __u8 pad1;
- __u16 pad2;
+ __u8 inject_flags; /* software inject flags */
+ __u16 pad;
__u32 cpuid; /* CPUID 1 EAX */
__u8 cs; /* code segment */
__u8 bank; /* machine check bank */