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| author | Chang S. Bae <chang.seok.bae@intel.com> | 2020-05-28 23:13:55 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2020-06-18 16:47:03 +0300 |
| commit | 96b2371413e8f636a5f25c42a933af21c35a2a41 (patch) | |
| tree | dd8db560ea94d2a7df4478b2abade4f266a5fd49 /arch/x86/include/asm/inst.h | |
| parent | 978e1342c3c4d7b20808fd5875d9ac0d57db22ee (diff) | |
| download | linux-96b2371413e8f636a5f25c42a933af21c35a2a41.tar.xz | |
x86/entry/64: Switch CR3 before SWAPGS in paranoid entry
When FSGSBASE is enabled, the GSBASE handling in paranoid entry will need
to retrieve the kernel GSBASE which requires that the kernel page table is
active.
As the CR3 switch to the kernel page tables (PTI is active) does not depend
on kernel GSBASE, move the CR3 switch in front of the GSBASE handling.
Comment the EBX content while at it.
No functional change.
[ tglx: Rewrote changelog and comments ]
Signed-off-by: Chang S. Bae <chang.seok.bae@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lkml.kernel.org/r/1557309753-24073-11-git-send-email-chang.seok.bae@intel.com
Link: https://lkml.kernel.org/r/20200528201402.1708239-10-sashal@kernel.org
Diffstat (limited to 'arch/x86/include/asm/inst.h')
0 files changed, 0 insertions, 0 deletions