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| author | Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> | 2018-04-26 05:04:18 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2018-05-03 14:55:47 +0300 |
| commit | 1b86883ccb8d5d9506529d42dbe1a5257cb30b18 (patch) | |
| tree | 62fc0a681b462a5703dabe5ad8d6acb8e7e2745a /arch/x86/include/asm/cpufeatures.h | |
| parent | d1059518b4789cabe34bb4b714d07e6089c82ca1 (diff) | |
| download | linux-1b86883ccb8d5d9506529d42dbe1a5257cb30b18.tar.xz | |
x86/bugs: Read SPEC_CTRL MSR during boot and re-use reserved bits
The 336996-Speculative-Execution-Side-Channel-Mitigations.pdf refers to all
the other bits as reserved. The Intel SDM glossary defines reserved as
implementation specific - aka unknown.
As such at bootup this must be taken it into account and proper masking for
the bits in use applied.
A copy of this document is available at
https://bugzilla.kernel.org/show_bug.cgi?id=199511
[ tglx: Made x86_spec_ctrl_base __ro_after_init ]
Suggested-by: Jon Masters <jcm@redhat.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Borislav Petkov <bp@suse.de>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/include/asm/cpufeatures.h')
0 files changed, 0 insertions, 0 deletions