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author | Thomas Gleixner <tglx@linutronix.de> | 2017-09-14 00:29:52 +0300 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2017-09-25 21:52:02 +0300 |
commit | 464d12309e1b5829597793db551ae8ecaecf4036 (patch) | |
tree | 171de12349d7f74ab5f0a5b9b03f7a6d71fd5345 /arch/x86/include/asm/apic.h | |
parent | 4900be83602b6be07366d3e69f756c1959f4169a (diff) | |
download | linux-464d12309e1b5829597793db551ae8ecaecf4036.tar.xz |
x86/vector: Switch IOAPIC to global reservation mode
IOAPICs install and allocate vectors for inactive interrupts. This results
in problems on CPU offline and wastes vector resources for nothing.
Handle inactive IOAPIC interrupts in the same way as inactive MSI
interrupts and switch them to the global reservation mode.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Juergen Gross <jgross@suse.com>
Tested-by: Yu Chen <yu.c.chen@intel.com>
Acked-by: Juergen Gross <jgross@suse.com>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Alok Kataria <akataria@vmware.com>
Cc: Joerg Roedel <joro@8bytes.org>
Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Christoph Hellwig <hch@lst.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Rui Zhang <rui.zhang@intel.com>
Cc: "K. Y. Srinivasan" <kys@microsoft.com>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Len Brown <lenb@kernel.org>
Link: https://lkml.kernel.org/r/20170913213156.273454591@linutronix.de
Diffstat (limited to 'arch/x86/include/asm/apic.h')
0 files changed, 0 insertions, 0 deletions