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authorJacob Pan <jacob.jun.pan@linux.intel.com>2010-05-19 23:01:25 +0400
committerH. Peter Anvin <hpa@linux.intel.com>2010-05-20 00:45:39 +0400
commita875c01944f0d750eeb1ef3133feceb13f13c4b3 (patch)
treecdd39431457cdeed92d67420a89296cbfb23f620 /arch/x86/include/asm/apb_timer.h
parenta0c173bd8a3fd0541be8e4ef962170e48d8811c7 (diff)
downloadlinux-a875c01944f0d750eeb1ef3133feceb13f13c4b3.tar.xz
x86, mrst: add more timer config options
Always-on local APIC timer (ARAT) has been introduced to Medfield, along with the platform APB timers we have more timer configuration options between Moorestown and Medfield. This patch adds run-time detection of avaiable timer features so that we can treat Medfield as a variant of Moorestown and set up the optimal timer options for each platform. i.e. Medfield: per cpu always-on local APIC timer Moorestown: per cpu APB timer Manual override is possible via cmdline option x86_mrst_timer. Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> LKML-Reference: <1274295685-6774-4-git-send-email-jacob.jun.pan@linux.intel.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'arch/x86/include/asm/apb_timer.h')
-rw-r--r--arch/x86/include/asm/apb_timer.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/x86/include/asm/apb_timer.h b/arch/x86/include/asm/apb_timer.h
index c74a2eebe570..a69b1ac9eaf8 100644
--- a/arch/x86/include/asm/apb_timer.h
+++ b/arch/x86/include/asm/apb_timer.h
@@ -55,7 +55,6 @@ extern unsigned long apbt_quick_calibrate(void);
extern int arch_setup_apbt_irqs(int irq, int trigger, int mask, int cpu);
extern void apbt_setup_secondary_clock(void);
extern unsigned int boot_cpu_id;
-extern int disable_apbt_percpu;
extern struct sfi_timer_table_entry *sfi_get_mtmr(int hint);
extern void sfi_free_mtmr(struct sfi_timer_table_entry *mtmr);