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| author | Xin Li <xin3.li@intel.com> | 2023-12-05 13:49:50 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2024-01-25 21:10:29 +0300 |
| commit | a4cb5ece145828cae35503857debf3d49c9d1c5f (patch) | |
| tree | c6fdc9b00cc4efc65f4ff43574809df8e7fa3d0f /arch/x86/entry | |
| parent | 6613476e225e090cc9aad49be7fa504e290dd33d (diff) | |
| download | linux-a4cb5ece145828cae35503857debf3d49c9d1c5f.tar.xz | |
x86/cpufeatures,opcode,msr: Add the WRMSRNS instruction support
WRMSRNS is an instruction that behaves exactly like WRMSR, with
the only difference being that it is not a serializing instruction
by default. Under certain conditions, WRMSRNS may replace WRMSR to
improve performance.
Add its CPU feature bit, opcode to the x86 opcode map, and an
always inline API __wrmsrns() to embed WRMSRNS into the code.
Signed-off-by: Xin Li <xin3.li@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Shan Kang <shan.kang@intel.com>
Acked-by: Masami Hiramatsu (Google) <mhiramat@kernel.org>
Acked-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20231205105030.8698-2-xin3.li@intel.com
Diffstat (limited to 'arch/x86/entry')
0 files changed, 0 insertions, 0 deletions