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| author | Joerg Roedel <jroedel@suse.de> | 2020-09-07 16:15:20 +0300 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2020-09-07 20:45:25 +0300 |
| commit | 29dcc60f6a19fb0aaee97bd1ae2ed8a7dc6f0cfe (patch) | |
| tree | 9bcd688e264f130c2928fa2a92e6729c6cd7c372 /arch/x86/boot/compressed/misc.h | |
| parent | 21cf2372618ef167d8c4ae04880fb873b55b2daa (diff) | |
| download | linux-29dcc60f6a19fb0aaee97bd1ae2ed8a7dc6f0cfe.tar.xz | |
x86/boot/compressed/64: Add stage1 #VC handler
Add the first handler for #VC exceptions. At stage 1 there is no GHCB
yet because the kernel might still be running on the EFI page table.
The stage 1 handler is limited to the MSR-based protocol to talk to the
hypervisor and can only support CPUID exit-codes, but that is enough to
get to stage 2.
[ bp: Zap superfluous newlines after rd/wrmsr instruction mnemonics. ]
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20200907131613.12703-20-joro@8bytes.org
Diffstat (limited to 'arch/x86/boot/compressed/misc.h')
| -rw-r--r-- | arch/x86/boot/compressed/misc.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/boot/compressed/misc.h b/arch/x86/boot/compressed/misc.h index 9840c82a39f1..eaa8b45ebccb 100644 --- a/arch/x86/boot/compressed/misc.h +++ b/arch/x86/boot/compressed/misc.h @@ -141,5 +141,6 @@ extern struct desc_ptr boot_idt_desc; /* IDT Entry Points */ void boot_page_fault(void); +void boot_stage1_vc(void); #endif /* BOOT_COMPRESSED_MISC_H */ |