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| author | Kirill A. Shutemov <kirill.shutemov@linux.intel.com> | 2019-09-13 12:54:52 +0300 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2019-09-16 17:51:20 +0300 |
| commit | 18ec1eaf58fbf2d9009a752a102a3d8e0d905a0f (patch) | |
| tree | bef73f2fc64f66e05461f5c9698978328cb69d4d /arch/x86/Kconfig | |
| parent | bc04a049f058a472695aa22905d57e2b1f4c77d9 (diff) | |
| download | linux-18ec1eaf58fbf2d9009a752a102a3d8e0d905a0f.tar.xz | |
x86/mm: Enable 5-level paging support by default
Support of boot-time switching between 4- and 5-level paging mode is
upstream since 4.17.
We run internal testing with 5-level paging support enabled for a while
and it doesn't not cause any functional or performance regression on
4-level paging hardware.
The only 5-level paging related regressions I saw were in early boot
code that runs independently from CONFIG_X86_5LEVEL.
The next major release of distributions expected to have
CONFIG_X86_5LEVEL=y.
Enable the option by default. It may help to catch obscure bugs early.
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Acked-by: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Borislav Petkov <bp@alien8.de>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Rik van Riel <riel@surriel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mm@kvack.org
Link: https://lkml.kernel.org/r/20190913095452.40592-1-kirill.shutemov@linux.intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/x86/Kconfig')
| -rw-r--r-- | arch/x86/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 58eae28c3dd6..d4bbebe1d72f 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1483,6 +1483,7 @@ config X86_PAE config X86_5LEVEL bool "Enable 5-level page tables support" + default y select DYNAMIC_MEMORY_LAYOUT select SPARSEMEM_VMEMMAP depends on X86_64 |