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author | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2013-11-15 05:38:05 +0400 |
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committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2013-11-15 05:38:05 +0400 |
commit | 42249094f79422fbf5ed4b54eeb48ff096809b8f (patch) | |
tree | 91e6850c8c7e8cc284cf8bb6363f8662f84011f4 /arch/tile/include/uapi/asm/cachectl.h | |
parent | 936816161978ca716a56c5e553c68f25972b1e3a (diff) | |
parent | 2c027b7c48a888ab173ba45babb4525e278375d9 (diff) | |
download | linux-42249094f79422fbf5ed4b54eeb48ff096809b8f.tar.xz |
Merge branch 'next' into for-linus
Merge first round of changes for 3.13 merge window.
Diffstat (limited to 'arch/tile/include/uapi/asm/cachectl.h')
-rw-r--r-- | arch/tile/include/uapi/asm/cachectl.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/tile/include/uapi/asm/cachectl.h b/arch/tile/include/uapi/asm/cachectl.h index af4c9f9154d1..572ddcad2090 100644 --- a/arch/tile/include/uapi/asm/cachectl.h +++ b/arch/tile/include/uapi/asm/cachectl.h @@ -29,8 +29,8 @@ * to honor the arguments at some point.) * * Flush and invalidation of memory can normally be performed with the - * __insn_flush(), __insn_inv(), and __insn_finv() instructions from - * userspace. The DCACHE option to the system call allows userspace + * __insn_flush() and __insn_finv() instructions from userspace. + * The DCACHE option to the system call allows userspace * to flush the entire L1+L2 data cache from the core. In this case, * the address and length arguments are not used. The DCACHE flush is * restricted to the current core, not all cores in the address space. |