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author | David S. Miller <davem@davemloft.net> | 2013-09-26 01:33:16 +0400 |
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committer | David S. Miller <davem@davemloft.net> | 2013-11-13 03:22:35 +0400 |
commit | 2b77933c28f5044629bb19e8045aae65b72b939d (patch) | |
tree | ecb5e23e19599a77748ec54b116ac59341c25a38 /arch/sparc/include/asm/page_64.h | |
parent | 37b3a8ff3e086cd5c369e77d2383b691b2874cd6 (diff) | |
download | linux-2b77933c28f5044629bb19e8045aae65b72b939d.tar.xz |
sparc64: Move to 64-bit PGDs and PMDs.
To make the page tables compact, we were using 32-bit PGDs and PMDs.
We only had to support <= 43 bits of physical addresses so this was
quite feasible.
In order to support larger physical addresses we have to move to
64-bit PGDs and PMDs.
Most of the changes are straight-forward:
1) {pgd,pmd}_t --> unsigned long
2) Anything that tries to use plain "unsigned int" types with pgd/pmd
values needs to be adjusted. In particular things like "0U" become
"0UL".
3) {PGDIR,PMD}_BITS decrease by one.
4) In the assembler page table walkers, use "ldxa" instead of "lduwa"
and adjust the low bit masks to clear out the low 3 bits instead of
just the low 2 bits during pgd/pmd address formation.
Also, use PTRS_PER_PGD and PTRS_PER_PMD in the sizing of the
swapper_{pg_dir,low_pmd_dir} arrays.
This patch does not try to take advantage of having 64-bits in the
PMDs to simplify the hugepage code, that will come in a subsequent
change.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/include/asm/page_64.h')
-rw-r--r-- | arch/sparc/include/asm/page_64.h | 25 |
1 files changed, 14 insertions, 11 deletions
diff --git a/arch/sparc/include/asm/page_64.h b/arch/sparc/include/asm/page_64.h index 1958bfbe300c..aac53fcea807 100644 --- a/arch/sparc/include/asm/page_64.h +++ b/arch/sparc/include/asm/page_64.h @@ -56,8 +56,8 @@ extern void copy_user_page(void *to, void *from, unsigned long vaddr, struct pag /* These are used to make use of C type-checking.. */ typedef struct { unsigned long pte; } pte_t; typedef struct { unsigned long iopte; } iopte_t; -typedef struct { unsigned int pmd; } pmd_t; -typedef struct { unsigned int pgd; } pgd_t; +typedef struct { unsigned long pmd; } pmd_t; +typedef struct { unsigned long pgd; } pgd_t; typedef struct { unsigned long pgprot; } pgprot_t; #define pte_val(x) ((x).pte) @@ -76,8 +76,8 @@ typedef struct { unsigned long pgprot; } pgprot_t; /* .. while these make it easier on the compiler */ typedef unsigned long pte_t; typedef unsigned long iopte_t; -typedef unsigned int pmd_t; -typedef unsigned int pgd_t; +typedef unsigned long pmd_t; +typedef unsigned long pgd_t; typedef unsigned long pgprot_t; #define pte_val(x) (x) @@ -97,15 +97,18 @@ typedef unsigned long pgprot_t; typedef pte_t *pgtable_t; /* These two values define the virtual address space range in which we - * must forbid 64-bit user processes from making mappings. It - * represents the virtual address space hole present in most early - * sparc64 chips including UltraSPARC-I. The next two defines specify - * the actual exclusion region we enforce, wherein we use a 4GB red - * zone on each side of the VA hole. + * must forbid 64-bit user processes from making mappings. It used to + * represent precisely the virtual address space hole present in most + * early sparc64 chips including UltraSPARC-I. But now it also is + * further constrained by the limits of our page tables, which is + * 43-bits of virtual address. */ -#define SPARC64_VA_HOLE_TOP _AC(0xfffff80000000000,UL) -#define SPARC64_VA_HOLE_BOTTOM _AC(0x0000080000000000,UL) +#define SPARC64_VA_HOLE_TOP _AC(0xfffffc0000000000,UL) +#define SPARC64_VA_HOLE_BOTTOM _AC(0x0000040000000000,UL) +/* The next two defines specify the actual exclusion region we + * enforce, wherein we use a 4GB red zone on each side of the VA hole. + */ #define VA_EXCLUDE_START (SPARC64_VA_HOLE_BOTTOM - (1UL << 32UL)) #define VA_EXCLUDE_END (SPARC64_VA_HOLE_TOP + (1UL << 32UL)) |