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| author | David Ahern <david.ahern@oracle.com> | 2015-03-19 23:06:37 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2015-03-20 04:54:49 +0300 |
| commit | b5aff55d89c27aedcae9521155b81b6aebb6c5d8 (patch) | |
| tree | bc59ebea2c767a7d1411441374aa22073f700be5 /arch/sparc/include/asm/hypervisor.h | |
| parent | d51291cb8f32bfae6b331e1838651f3ddefa73a5 (diff) | |
| download | linux-b5aff55d89c27aedcae9521155b81b6aebb6c5d8.tar.xz | |
sparc: perf: Add support M7 processor
The M7 processor has a different hypervisor group id and different PCR fast
trap values. PIC read/write functions and PCR bit fields are the same as
the T4 so those are reused.
Signed-off-by: David Ahern <david.ahern@oracle.com>
Acked-by: Bob Picco <bob.picco@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/include/asm/hypervisor.h')
| -rw-r--r-- | arch/sparc/include/asm/hypervisor.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/sparc/include/asm/hypervisor.h b/arch/sparc/include/asm/hypervisor.h index 4f6725ff4c33..f5b6537306f0 100644 --- a/arch/sparc/include/asm/hypervisor.h +++ b/arch/sparc/include/asm/hypervisor.h @@ -2957,6 +2957,17 @@ unsigned long sun4v_t5_set_perfreg(unsigned long reg_num, unsigned long reg_val); #endif + +#define HV_FAST_M7_GET_PERFREG 0x43 +#define HV_FAST_M7_SET_PERFREG 0x44 + +#ifndef __ASSEMBLY__ +unsigned long sun4v_m7_get_perfreg(unsigned long reg_num, + unsigned long *reg_val); +unsigned long sun4v_m7_set_perfreg(unsigned long reg_num, + unsigned long reg_val); +#endif + /* Function numbers for HV_CORE_TRAP. */ #define HV_CORE_SET_VER 0x00 #define HV_CORE_PUTCHAR 0x01 @@ -2981,6 +2992,7 @@ unsigned long sun4v_t5_set_perfreg(unsigned long reg_num, #define HV_GRP_SDIO 0x0108 #define HV_GRP_SDIO_ERR 0x0109 #define HV_GRP_REBOOT_DATA 0x0110 +#define HV_GRP_M7_PERF 0x0114 #define HV_GRP_NIAG_PERF 0x0200 #define HV_GRP_FIRE_PERF 0x0201 #define HV_GRP_N2_CPU 0x0202 |