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author | Paul Mundt <lethal@linux-sh.org> | 2010-04-02 11:13:27 +0400 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2010-04-02 11:13:27 +0400 |
commit | be97d758e5728099e95fe229866d5c6c900d3092 (patch) | |
tree | 5c5a3fa4b7978857562d730e3101181b5fbebb9f /arch/sh/mm/tlb-sh3.c | |
parent | 5dd6ef5050c5012267e2b84f3d82ba85cdb5ca32 (diff) | |
download | linux-be97d758e5728099e95fe229866d5c6c900d3092.tar.xz |
sh: Fix up the SH-3 build for recent TLB changes.
While the MMUCR.URB and ITLB/UTLB differentiation works fine for all SH-4
and later TLBs, these features are absent on SH-3. This splits out
local_flush_tlb_all() in to SH-4 and PTEAEX copies while restoring the
old SH-3 one, subsequently fixing up the build.
This will probably want some further reordering and tidying in the
future, but that's out of scope at present.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/mm/tlb-sh3.c')
-rw-r--r-- | arch/sh/mm/tlb-sh3.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/sh/mm/tlb-sh3.c b/arch/sh/mm/tlb-sh3.c index 4f5f7cbdd508..7a940dbfc2e9 100644 --- a/arch/sh/mm/tlb-sh3.c +++ b/arch/sh/mm/tlb-sh3.c @@ -77,3 +77,22 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page) for (i = 0; i < ways; i++) __raw_writel(data, addr + (i << 8)); } + +void local_flush_tlb_all(void) +{ + unsigned long flags, status; + + /* + * Flush all the TLB. + * + * Write to the MMU control register's bit: + * TF-bit for SH-3, TI-bit for SH-4. + * It's same position, bit #2. + */ + local_irq_save(flags); + status = __raw_readl(MMUCR); + status |= 0x04; + __raw_writel(status, MMUCR); + ctrl_barrier(); + local_irq_restore(flags); +} |