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author | Paul Mundt <lethal@linux-sh.org> | 2009-08-15 06:05:42 +0400 |
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committer | Paul Mundt <lethal@linux-sh.org> | 2009-08-15 06:05:42 +0400 |
commit | ecba1060583635ab55092072441ff903b5e9a659 (patch) | |
tree | d84dc75eae0b1bb2a2751240783444e2e92ca695 /arch/sh/mm/cache-sh5.c | |
parent | e82da214d2fe3dc2610df966100c4f36bc0fad91 (diff) | |
download | linux-ecba1060583635ab55092072441ff903b5e9a659.tar.xz |
sh: Centralize the CPU cache initialization routines.
This provides a central point for CPU cache initialization routines.
This replaces the antiquated p3_cache_init() method, which the vast
majority of CPUs never cared about.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/sh/mm/cache-sh5.c')
-rw-r--r-- | arch/sh/mm/cache-sh5.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/sh/mm/cache-sh5.c b/arch/sh/mm/cache-sh5.c index 28f3c8fb1b99..576cad04b11b 100644 --- a/arch/sh/mm/cache-sh5.c +++ b/arch/sh/mm/cache-sh5.c @@ -23,7 +23,7 @@ /* Wired TLB entry for the D-cache */ static unsigned long long dtlb_cache_slot; -void __init p3_cache_init(void) +void __init cpu_cache_init(void) { /* Reserve a slot for dcache colouring in the DTLB */ dtlb_cache_slot = sh64_get_wired_dtlb_entry(); |