diff options
| author | David Woodhouse <David.Woodhouse@intel.com> | 2010-03-26 17:55:59 +0300 |
|---|---|---|
| committer | David Woodhouse <David.Woodhouse@intel.com> | 2010-03-26 17:55:59 +0300 |
| commit | 329f9052dbadf6f4afe2231668bd00c579a4aa10 (patch) | |
| tree | e080a5c70df40f3ae8cf28a95a3267757668ab97 /arch/sh/boards/mach-highlander/irq-r7785rp.c | |
| parent | 395b228858778d3c44f7c413693a6acaa8bb62dc (diff) | |
| parent | 220bf991b0366cc50a94feede3d7341fa5710ee4 (diff) | |
| download | linux-329f9052dbadf6f4afe2231668bd00c579a4aa10.tar.xz | |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
drivers/mtd/nand/sh_flctl.c
Maxim's patch to initialise sysfs attributes depends on the patch which
actually adds sysfs_attr_init().
Diffstat (limited to 'arch/sh/boards/mach-highlander/irq-r7785rp.c')
| -rw-r--r-- | arch/sh/boards/mach-highlander/irq-r7785rp.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/sh/boards/mach-highlander/irq-r7785rp.c b/arch/sh/boards/mach-highlander/irq-r7785rp.c index 3811b060a39b..558b24862776 100644 --- a/arch/sh/boards/mach-highlander/irq-r7785rp.c +++ b/arch/sh/boards/mach-highlander/irq-r7785rp.c @@ -66,20 +66,20 @@ static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors, unsigned char * __init highlander_plat_irq_setup(void) { - if ((ctrl_inw(0xa4000158) & 0xf000) != 0x1000) + if ((__raw_readw(0xa4000158) & 0xf000) != 0x1000) return NULL; printk(KERN_INFO "Using r7785rp interrupt controller.\n"); - ctrl_outw(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */ + __raw_writew(0x0000, PA_IRLSSR1); /* FPGA IRLSSR1(CF_CD clear) */ /* Setup the FPGA IRL */ - ctrl_outw(0x0000, PA_IRLPRA); /* FPGA IRLA */ - ctrl_outw(0xe598, PA_IRLPRB); /* FPGA IRLB */ - ctrl_outw(0x7060, PA_IRLPRC); /* FPGA IRLC */ - ctrl_outw(0x0000, PA_IRLPRD); /* FPGA IRLD */ - ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */ - ctrl_outw(0xdcba, PA_IRLPRF); /* FPGA IRLF */ + __raw_writew(0x0000, PA_IRLPRA); /* FPGA IRLA */ + __raw_writew(0xe598, PA_IRLPRB); /* FPGA IRLB */ + __raw_writew(0x7060, PA_IRLPRC); /* FPGA IRLC */ + __raw_writew(0x0000, PA_IRLPRD); /* FPGA IRLD */ + __raw_writew(0x4321, PA_IRLPRE); /* FPGA IRLE */ + __raw_writew(0xdcba, PA_IRLPRF); /* FPGA IRLF */ register_intc_controller(&intc_desc); return irl2irq; |