riscv: support for Svpbmt and D1 memory types

Adds support for Svpbmt, the "Supervisor-mode: page-based memory types"
extension, which allows pages to be marked as non-cacheable and/or I/O.
This also includes support for the Allwinner D1's page table attributes
via the alternatives framework, which differ from Svpbmt in various ways
but are necessary to make the D1 function.

* palmer/riscv-d1:
  riscv: add memory-type errata for T-Head
  riscv: don't use global static vars to store alternative data
  riscv: remove FIXMAP_PAGE_IO and fall back to its default value
  riscv: add RISC-V Svpbmt extension support
  riscv: Fix accessing pfn bits in PTEs for non-32bit variants
  riscv: move boot alternatives to after fill_hwcap
  riscv: prevent compressed instructions in alternatives
  riscv: extend concatenated alternatives-lines to the same length
  riscv: implement ALTERNATIVE_2 macro
  riscv: implement module alternatives
  riscv: allow different stages with alternatives
  riscv: integrate alternatives better into the main architecture

1 files changed, 1 insertions, 0 deletions

diff --git a/arch/riscv/mm/init.c b/arch/riscv/mm/init.c
index 9535bea8688c..1d35a0667db3 100644
--- a/arch/riscv/mm/init.c
+++ b/arch/riscv/mm/init.c
@@ -935,6 +935,7 @@ asmlinkage void __init setup_vm(uintptr_t dtb_pa)
 	BUG_ON((kernel_map.virt_addr + kernel_map.size) > ADDRESS_SPACE_END - SZ_4K);
 #endif
 
+	apply_early_boot_alternatives();
 	pt_ops_set_early();
 
 	/* Setup early PGD for fixmap */