diff options
| author | Zhang Rui <rui.zhang@intel.com> | 2020-08-11 18:31:49 +0300 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2020-08-14 13:35:12 +0300 |
| commit | bcfd218b66790243ef303c1b35ce59f786ded225 (patch) | |
| tree | 949e7bae35d62ee8a200c9a5cb7873b71cc9bf45 /arch/riscv/include/asm/pgalloc.h | |
| parent | 74f41adab0f4a61857833e1b6fa8e9ad12c251b6 (diff) | |
| download | linux-bcfd218b66790243ef303c1b35ce59f786ded225.tar.xz | |
perf/x86/rapl: Add support for Intel SPR platform
Intel SPR platform uses fixed 16 bit energy unit for DRAM RAPL domain,
and fixed 0 bit energy unit for Psys RAPL domain.
After this, on SPR platform the energy counters appear in perf list.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Kan Liang <kan.liang@linux.intel.com>
Acked-by: Len Brown <len.brown@intel.com>
Link: https://lore.kernel.org/r/20200811153149.12242-4-rui.zhang@intel.com
Diffstat (limited to 'arch/riscv/include/asm/pgalloc.h')
0 files changed, 0 insertions, 0 deletions