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| author | Yash Shah <yash.shah@sifive.com> | 2019-10-25 11:30:03 +0300 |
|---|---|---|
| committer | Paul Walmsley <paul.walmsley@sifive.com> | 2019-10-28 20:43:32 +0300 |
| commit | 00a5bf3a8ca30d19f24219fc3cfb74f4eab3600d (patch) | |
| tree | ca4482fe65348fc5321ed6093a9f5352fe70bb5b /arch/riscv/include/asm/io.h | |
| parent | f307307992bf63e609fe5395953048e81c9ebc54 (diff) | |
| download | linux-00a5bf3a8ca30d19f24219fc3cfb74f4eab3600d.tar.xz | |
RISC-V: Add PCIe I/O BAR memory mapping
For legacy I/O BARs (non-MMIO BARs) to work correctly on RISC-V Linux,
we need to establish a reserved memory region for them, so that drivers
that wish to use the legacy I/O BARs can issue reads and writes against
a memory region that is mapped to the host PCIe controller's I/O BAR
mapping.
Signed-off-by: Yash Shah <yash.shah@sifive.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Diffstat (limited to 'arch/riscv/include/asm/io.h')
| -rw-r--r-- | arch/riscv/include/asm/io.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h index fc1189ad3777..3ba4d93721d3 100644 --- a/arch/riscv/include/asm/io.h +++ b/arch/riscv/include/asm/io.h @@ -13,6 +13,7 @@ #include <linux/types.h> #include <asm/mmiowb.h> +#include <asm/pgtable.h> extern void __iomem *ioremap(phys_addr_t offset, unsigned long size); @@ -162,6 +163,12 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) #endif /* + * I/O port access constants. + */ +#define IO_SPACE_LIMIT (PCI_IO_SIZE - 1) +#define PCI_IOBASE ((void __iomem *)PCI_IO_START) + +/* * Emulation routines for the port-mapped IO space used by some PCI drivers. * These are defined as being "fully synchronous", but also "not guaranteed to * be fully ordered with respect to other memory and I/O operations". We're |