diff options
| author | Mason Huo <mason.huo@starfivetech.com> | 2023-06-06 13:56:54 +0300 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2023-06-06 14:32:06 +0300 |
| commit | 2378341504de476acd880833a0e5481555b9aa5c (patch) | |
| tree | f79caff1ddcac8e2d7cdf1361d427f1ce9199c69 /arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | |
| parent | b087f59779b00f73738fdf6a63915aabf77c7d39 (diff) | |
| download | linux-2378341504de476acd880833a0e5481555b9aa5c.tar.xz | |
riscv: dts: starfive: Enable axp15060 pmic for cpufreq
The VisionFive 2 board has an embedded pmic axp15060,
which supports the cpu DVFS through the dcdc2 regulator.
This patch enables axp15060 pmic and configs the dcdc2.
Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi')
| -rw-r--r-- | arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi index 2a6d81609284..9714da5550d7 100644 --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi @@ -114,6 +114,23 @@ pinctrl-names = "default"; pinctrl-0 = <&i2c5_pins>; status = "okay"; + + axp15060: pmic@36 { + compatible = "x-powers,axp15060"; + reg = <0x36>; + interrupts = <0>; + interrupt-controller; + #interrupt-cells = <1>; + + regulators { + vdd_cpu: dcdc2 { + regulator-always-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1540000>; + regulator-name = "vdd-cpu"; + }; + }; + }; }; &i2c6 { |