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authorPaolo Bonzini <pbonzini@redhat.com>2024-05-10 17:49:02 +0300
committerPaolo Bonzini <pbonzini@redhat.com>2024-05-10 20:20:18 +0300
commit4232da23d75d173195c6766729e51947b64f83cd (patch)
tree7eb1420b118d452c0b497bf6267ecdfb0a6d5931 /arch/riscv/Kconfig.errata
parentbbe10a5cc0c775e52e91c8b3b6547b59b2054f44 (diff)
parent7b7e584f90bf670d5c6f2b1fff884bf3b972cad4 (diff)
downloadlinux-4232da23d75d173195c6766729e51947b64f83cd.tar.xz
Merge tag 'loongarch-kvm-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson into HEAD
LoongArch KVM changes for v6.10 1. Add ParaVirt IPI support. 2. Add software breakpoint support. 3. Add mmio trace events support.
Diffstat (limited to 'arch/riscv/Kconfig.errata')
-rw-r--r--arch/riscv/Kconfig.errata8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/riscv/Kconfig.errata b/arch/riscv/Kconfig.errata
index 910ba8837add..2acc7d876e1f 100644
--- a/arch/riscv/Kconfig.errata
+++ b/arch/riscv/Kconfig.errata
@@ -82,14 +82,14 @@ config ERRATA_THEAD
Otherwise, please say "N" here to avoid unnecessary overhead.
-config ERRATA_THEAD_PBMT
- bool "Apply T-Head memory type errata"
+config ERRATA_THEAD_MAE
+ bool "Apply T-Head's memory attribute extension (XTheadMae) errata"
depends on ERRATA_THEAD && 64BIT && MMU
select RISCV_ALTERNATIVE_EARLY
default y
help
- This will apply the memory type errata to handle the non-standard
- memory type bits in page-table-entries on T-Head SoCs.
+ This will apply the memory attribute extension errata to handle the
+ non-standard PTE utilization on T-Head SoCs (XTheadMae).
If you don't know what to do here, say "Y".