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authorGreg KH <gregkh@suse.de>2005-09-12 23:45:04 +0400
committerGreg Kroah-Hartman <gregkh@suse.de>2005-09-12 23:45:04 +0400
commitd58dde0f552a5c5c4485b962d8b6e9dd54fefb30 (patch)
treed9a7e35eb88fea6265d5aadcc3d4ed39122b052a /arch/ppc/boot/common/util.S
parent877599fdef5ea4a7dd1956e22fa9d6923add97f8 (diff)
parent2ade81473636b33aaac64495f89a7dc572c529f0 (diff)
downloadlinux-d58dde0f552a5c5c4485b962d8b6e9dd54fefb30.tar.xz
Merge ../torvalds-2.6/
Diffstat (limited to 'arch/ppc/boot/common/util.S')
-rw-r--r--arch/ppc/boot/common/util.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/ppc/boot/common/util.S b/arch/ppc/boot/common/util.S
index 47e641455bc5..c96c9f80521e 100644
--- a/arch/ppc/boot/common/util.S
+++ b/arch/ppc/boot/common/util.S
@@ -252,7 +252,7 @@ _GLOBAL(flush_instruction_cache)
1: dcbf r0,r3 # Flush the data cache
icbi r0,r3 # Invalidate the instruction cache
addi r3,r3,0x10 # Increment by one cache line
- cmplwi cr0,r3,r4 # Are we at the end yet?
+ cmplw cr0,r3,r4 # Are we at the end yet?
blt 1b # No, keep flushing and invalidating
#else
/* Enable, invalidate and then disable the L1 icache/dcache. */