diff options
| author | Stephen Rothwell <sfr@canb.auug.org.au> | 2006-03-23 09:38:10 +0300 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2006-03-27 07:48:08 +0400 |
| commit | af308377e204e25f1f58627d05fe0f483703b514 (patch) | |
| tree | bed18644cbf621ecb5447e626e6a0957ab363a46 /arch/powerpc/platforms/powermac/nvram.c | |
| parent | 7c92943c7b6c42fa631ac2b67aeb507e727cd75b (diff) | |
| download | linux-af308377e204e25f1f58627d05fe0f483703b514.tar.xz | |
[PATCH] powerpc: fix various sparse warnings
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms/powermac/nvram.c')
| -rw-r--r-- | arch/powerpc/platforms/powermac/nvram.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/powerpc/platforms/powermac/nvram.c b/arch/powerpc/platforms/powermac/nvram.c index 5fd28995c74c..3aa3477b86f7 100644 --- a/arch/powerpc/platforms/powermac/nvram.c +++ b/arch/powerpc/platforms/powermac/nvram.c @@ -74,7 +74,7 @@ struct core99_header { * Read and write the non-volatile RAM on PowerMacs and CHRP machines. */ static int nvram_naddrs; -static volatile unsigned char *nvram_data; +static volatile unsigned char __iomem *nvram_data; static int is_core_99; static int core99_bank = 0; static int nvram_partitions[3]; @@ -148,7 +148,7 @@ static ssize_t core99_nvram_size(void) } #ifdef CONFIG_PPC32 -static volatile unsigned char *nvram_addr; +static volatile unsigned char __iomem *nvram_addr; static int nvram_mult; static unsigned char direct_nvram_read_byte(int addr) @@ -285,7 +285,7 @@ static int sm_erase_bank(int bank) int stat, i; unsigned long timeout; - u8* base = (u8 *)nvram_data + core99_bank*NVRAM_SIZE; + u8 __iomem *base = (u8 __iomem *)nvram_data + core99_bank*NVRAM_SIZE; DBG("nvram: Sharp/Micron Erasing bank %d...\n", bank); @@ -317,7 +317,7 @@ static int sm_write_bank(int bank, u8* datas) int i, stat = 0; unsigned long timeout; - u8* base = (u8 *)nvram_data + core99_bank*NVRAM_SIZE; + u8 __iomem *base = (u8 __iomem *)nvram_data + core99_bank*NVRAM_SIZE; DBG("nvram: Sharp/Micron Writing bank %d...\n", bank); @@ -352,7 +352,7 @@ static int amd_erase_bank(int bank) int i, stat = 0; unsigned long timeout; - u8* base = (u8 *)nvram_data + core99_bank*NVRAM_SIZE; + u8 __iomem *base = (u8 __iomem *)nvram_data + core99_bank*NVRAM_SIZE; DBG("nvram: AMD Erasing bank %d...\n", bank); @@ -399,7 +399,7 @@ static int amd_write_bank(int bank, u8* datas) int i, stat = 0; unsigned long timeout; - u8* base = (u8 *)nvram_data + core99_bank*NVRAM_SIZE; + u8 __iomem *base = (u8 __iomem *)nvram_data + core99_bank*NVRAM_SIZE; DBG("nvram: AMD Writing bank %d...\n", bank); |