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| author | Ingo Molnar <mingo@kernel.org> | 2015-08-25 10:59:19 +0300 |
|---|---|---|
| committer | Ingo Molnar <mingo@kernel.org> | 2015-08-25 10:59:19 +0300 |
| commit | 8d58b66ed2b000f27658c88a4ed70e8042e86a58 (patch) | |
| tree | 5bae2c74f932b5d863f72cb698a6f71260340b26 /arch/powerpc/platforms/85xx/twr_p102x.c | |
| parent | 13fe86f465b72fc9328d4f5ebc33223c011852ae (diff) | |
| parent | c13dcf9f2d6f5f06ef1bf79ec456df614c5e058b (diff) | |
| download | linux-8d58b66ed2b000f27658c88a4ed70e8042e86a58.tar.xz | |
Merge tag 'v4.2-rc8' into x86/mm, before applying new changes
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Diffstat (limited to 'arch/powerpc/platforms/85xx/twr_p102x.c')
| -rw-r--r-- | arch/powerpc/platforms/85xx/twr_p102x.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/powerpc/platforms/85xx/twr_p102x.c b/arch/powerpc/platforms/85xx/twr_p102x.c index 1eadb6d0dc64..30e002f4648c 100644 --- a/arch/powerpc/platforms/85xx/twr_p102x.c +++ b/arch/powerpc/platforms/85xx/twr_p102x.c @@ -79,7 +79,7 @@ static void __init twr_p1025_setup_arch(void) mpc85xx_qe_init(); mpc85xx_qe_par_io_init(); -#if defined(CONFIG_UCC_GETH) || defined(CONFIG_SERIAL_QE) +#if IS_ENABLED(CONFIG_UCC_GETH) || IS_ENABLED(CONFIG_SERIAL_QE) if (machine_is(twr_p1025)) { struct ccsr_guts __iomem *guts; @@ -101,7 +101,7 @@ static void __init twr_p1025_setup_arch(void) MPC85xx_PMUXCR_QE(12)); iounmap(guts); -#if defined(CONFIG_SERIAL_QE) +#if IS_ENABLED(CONFIG_SERIAL_QE) /* On P1025TWR board, the UCC7 acted as UART port. * However, The UCC7's CTS pin is low level in default, * it will impact the transmission in full duplex |