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author | Christophe Leroy <christophe.leroy@c-s.fr> | 2018-01-12 15:45:23 +0300 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2018-01-16 15:47:12 +0300 |
commit | cd99ddbea250ee79027df6c469f51ad9e5452738 (patch) | |
tree | bdf7792780f06be984ec2cc200eb725dd10b7a4a /arch/powerpc/perf/Makefile | |
parent | bb9b5a8332533ac7935ca6edfc7ebf15a5366f11 (diff) | |
download | linux-cd99ddbea250ee79027df6c469f51ad9e5452738.tar.xz |
powerpc/8xx: Only perform perf counting when perf is in use.
In TLB miss handlers, updating the perf counter is only useful
when performing a perf analysis. As it has a noticeable overhead,
let's only do it when needed.
In order to do so, the exit of the miss handlers will be patched
when starting/stopping 'perf': the first register restore
instruction of each exit point will be replaced by a jump to
the counting code.
Once this is done, CONFIG_PPC_8xx_PERF_EVENT becomes useless as
this feature doesn't add any overhead.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/perf/Makefile')
-rw-r--r-- | arch/powerpc/perf/Makefile | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/perf/Makefile b/arch/powerpc/perf/Makefile index 225c9c86d7c0..57ebc655d2ac 100644 --- a/arch/powerpc/perf/Makefile +++ b/arch/powerpc/perf/Makefile @@ -15,7 +15,7 @@ obj-$(CONFIG_FSL_EMB_PERF_EVENT_E500) += e500-pmu.o e6500-pmu.o obj-$(CONFIG_HV_PERF_CTRS) += hv-24x7.o hv-gpci.o hv-common.o -obj-$(CONFIG_PPC_8xx_PERF_EVENT) += 8xx-pmu.o +obj-$(CONFIG_PPC_8xx) += 8xx-pmu.o obj-$(CONFIG_PPC64) += $(obj64-y) obj-$(CONFIG_PPC32) += $(obj32-y) |