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| author | Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> | 2019-10-17 11:05:00 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-11-10 13:25:41 +0300 |
| commit | e40f21667951a2239862bd3b149495a9037b453e (patch) | |
| tree | a3a7598b48d777c2a045c6b8642bd80a6003e253 /arch/powerpc/mm/pgtable.c | |
| parent | bf31532edb095a82852baaf1694dd593f9322e3f (diff) | |
| download | linux-e40f21667951a2239862bd3b149495a9037b453e.tar.xz | |
powerpc/mm: Fixup tlbie vs store ordering issue on POWER9
commit a5d4b5891c2f1f865a2def1eb0030f534e77ff86 upstream.
On POWER9, under some circumstances, a broadcast TLB invalidation
might complete before all previous stores have drained, potentially
allowing stale stores from becoming visible after the invalidation.
This works around it by doubling up those TLB invalidations which was
verified by HW to be sufficient to close the risk window.
This will be documented in a yet-to-be-published errata.
Cc: stable@vger.kernel.org # v4.14
Fixes: 1a472c9dba6b ("powerpc/mm/radix: Add tlbflush routines")
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
[mpe: Enable the feature in the DT CPU features code for all Power9,
rename the feature to CPU_FTR_P9_TLBIE_BUG per benh.]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20180323045627.16800-3-aneesh.kumar@linux.vnet.ibm.com/
[sandipan: Backported to v4.14]
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/powerpc/mm/pgtable.c')
0 files changed, 0 insertions, 0 deletions