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| author | Kumar Gala <galak@kernel.crashing.org> | 2009-10-17 03:48:40 +0400 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2010-10-14 09:55:14 +0400 |
| commit | 55fd766b5fad8240b7a6e994b5779a46d28f73d4 (patch) | |
| tree | d00d9ddd5fb635d083e573d68675115489c46f19 /arch/powerpc/mm/mmu_decl.h | |
| parent | 988cf86d4f0da4150e808300c145ba87c0aad02f (diff) | |
| download | linux-55fd766b5fad8240b7a6e994b5779a46d28f73d4.tar.xz | |
powerpc/fsl-booke64: Use TLB CAMs to cover linear mapping on FSL 64-bit chips
On Freescale parts typically have TLB array for large mappings that we can
bolt the linear mapping into. We utilize the code that already exists
on PPC32 on the 64-bit side to setup the linear mapping to be cover by
bolted TLB entries. We utilize a quarter of the variable size TLB array
for this purpose.
Additionally, we limit the amount of memory to what we can cover via
bolted entries so we don't get secondary faults in the TLB miss
handlers. We should fix this limitation in the future.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/mm/mmu_decl.h')
| -rw-r--r-- | arch/powerpc/mm/mmu_decl.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h index 63b84a0d3b10..dd0a2589591d 100644 --- a/arch/powerpc/mm/mmu_decl.h +++ b/arch/powerpc/mm/mmu_decl.h @@ -140,10 +140,13 @@ extern void wii_memory_fixups(void); extern void MMU_init_hw(void); extern unsigned long mmu_mapin_ram(unsigned long top); -#elif defined(CONFIG_FSL_BOOKE) +#elif defined(CONFIG_PPC_FSL_BOOK3E) +extern unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx); +#ifdef CONFIG_PPC32 extern void MMU_init_hw(void); extern unsigned long mmu_mapin_ram(unsigned long top); extern void adjust_total_lowmem(void); +#endif extern void loadcam_entry(unsigned int index); struct tlbcam { |