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| author | Paul Mackerras <paulus@ozlabs.org> | 2023-03-08 09:36:11 +0300 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2023-04-03 08:45:59 +0300 |
| commit | a3800ef9c48c4497dafe5ede1b65d91d9ef9cf1e (patch) | |
| tree | ba1c7ea92cc4ca0156fb5f00fe6a8fbe946ca658 /arch/powerpc/kvm/book3s_rmhandlers.S | |
| parent | 953e37397fb61be61f095d36972188bac5235021 (diff) | |
| download | linux-a3800ef9c48c4497dafe5ede1b65d91d9ef9cf1e.tar.xz | |
KVM: PPC: Enable prefixed instructions for HV KVM and disable for PR KVM
Now that we can read prefixed instructions from a HV KVM guest and
emulate prefixed load/store instructions to emulated MMIO locations,
we can add HFSCR_PREFIXED into the set of bits that are set in the
HFSCR for a HV KVM guest on POWER10, allowing the guest to use
prefixed instructions.
PR KVM has not yet been extended to handle prefixed instructions in
all situations where we might need to emulate them, so prevent the
guest from enabling prefixed instructions in the FSCR for now.
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Tested-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Tested-by: Sachin Sant <sachinp@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/ZAgs25dCmLrVkBdU@cleo
Diffstat (limited to 'arch/powerpc/kvm/book3s_rmhandlers.S')
| -rw-r--r-- | arch/powerpc/kvm/book3s_rmhandlers.S | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/kvm/book3s_rmhandlers.S b/arch/powerpc/kvm/book3s_rmhandlers.S index 03886ca24498..0a557ffca9fe 100644 --- a/arch/powerpc/kvm/book3s_rmhandlers.S +++ b/arch/powerpc/kvm/book3s_rmhandlers.S @@ -123,6 +123,7 @@ INTERRUPT_TRAMPOLINE BOOK3S_INTERRUPT_ALTIVEC kvmppc_handler_skip_ins: /* Patch the IP to the next instruction */ + /* Note that prefixed instructions are disabled in PR KVM for now */ mfsrr0 r12 addi r12, r12, 4 mtsrr0 r12 |