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| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-04-18 20:12:14 +0400 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2011-04-18 20:12:14 +0400 |
| commit | fac56c2df51bc29b07b3c2dcfabf32a015a0522c (patch) | |
| tree | 1ff5d84ecf4ea0bcbd42e2ef9624b5ade3810890 /arch/powerpc/include/asm/uninorth.h | |
| parent | 6caa15d0b84d2ea688fd31f4f172c8353463e109 (diff) | |
| parent | a6360dd37e1a144ed11e6548371bade559a1e4df (diff) | |
| download | linux-fac56c2df51bc29b07b3c2dcfabf32a015a0522c.tar.xz | |
Merge commit 'v2.6.39-rc3' into for-2.6.39
Diffstat (limited to 'arch/powerpc/include/asm/uninorth.h')
| -rw-r--r-- | arch/powerpc/include/asm/uninorth.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/uninorth.h b/arch/powerpc/include/asm/uninorth.h index f737732c3861..ae9c899c8a6d 100644 --- a/arch/powerpc/include/asm/uninorth.h +++ b/arch/powerpc/include/asm/uninorth.h @@ -60,7 +60,7 @@ * * Obviously, the GART is not cache coherent and so any change to it * must be flushed to memory (or maybe just make the GART space non - * cachable). AGP memory itself doens't seem to be cache coherent neither. + * cachable). AGP memory itself does't seem to be cache coherent neither. * * In order to invalidate the GART (which is probably necessary to inval * the bridge internal TLBs), the following sequence has to be written, |