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authorNicholas Piggin <npiggin@gmail.com>2018-06-01 13:01:20 +0300
committerMichael Ellerman <mpe@ellerman.id.au>2018-06-03 13:40:36 +0300
commit85bcfaf69cbd610fdfac3351cf385809a2f4a93b (patch)
tree0c3ec307217742cf1857462744ca588ecca006e9 /arch/powerpc/include/asm/tlb.h
parentf1cb8f9beba8699dd1b4518418191499e53f7b17 (diff)
downloadlinux-85bcfaf69cbd610fdfac3351cf385809a2f4a93b.tar.xz
powerpc/64s/radix: optimise pte_update
Implementing pte_update with pte_xchg (which uses cmpxchg) is inefficient. A single larx/stcx. works fine, no need for the less efficient cmpxchg sequence. Then remove the memory barriers from the operation. There is a requirement for TLB flushing to load mm_cpumask after the store that reduces pte permissions, which is moved into the TLB flush code. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include/asm/tlb.h')
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