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| author | Oliver O'Halloran <oohall@gmail.com> | 2017-06-29 10:12:55 +0300 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2017-08-31 07:26:56 +0300 |
| commit | 2a636a56d2d39676fe85190dec102c7440e24977 (patch) | |
| tree | 8baf43a855645c57565231e16b1bd36612103234 /arch/powerpc/include/asm/smp.h | |
| parent | df52f6714071c49a1fb1f541d4c4ff929bd4594d (diff) | |
| download | linux-2a636a56d2d39676fe85190dec102c7440e24977.tar.xz | |
powerpc/smp: Add cpu_l2_cache_map
We want to add an extra level to the CPU scheduler topology to account
for cores which share a cache. To do this we need to build a cpumask
for each CPU that indicates which CPUs share this cache to use as an
input to the scheduler.
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include/asm/smp.h')
| -rw-r--r-- | arch/powerpc/include/asm/smp.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h index 8ea98504f900..fac963e10d39 100644 --- a/arch/powerpc/include/asm/smp.h +++ b/arch/powerpc/include/asm/smp.h @@ -97,6 +97,7 @@ static inline void set_hard_smp_processor_id(int cpu, int phys) #endif DECLARE_PER_CPU(cpumask_var_t, cpu_sibling_map); +DECLARE_PER_CPU(cpumask_var_t, cpu_l2_cache_map); DECLARE_PER_CPU(cpumask_var_t, cpu_core_map); static inline struct cpumask *cpu_sibling_mask(int cpu) @@ -109,6 +110,11 @@ static inline struct cpumask *cpu_core_mask(int cpu) return per_cpu(cpu_core_map, cpu); } +static inline struct cpumask *cpu_l2_cache_mask(int cpu) +{ + return per_cpu(cpu_l2_cache_map, cpu); +} + extern int cpu_to_core_id(int cpu); /* Since OpenPIC has only 4 IPIs, we use slightly different message numbers. |