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| author | Christophe Leroy <christophe.leroy@c-s.fr> | 2018-11-29 17:07:03 +0300 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2018-12-04 11:45:01 +0300 |
| commit | 129dd323ddb808ee2fbd9f2a89d97d2cc7959790 (patch) | |
| tree | cd58e1b86b85d4e34c65a28881bbbeb5c7a73231 /arch/powerpc/include/asm/nohash/64/pgalloc.h | |
| parent | 32ea4c14999006fea541b5f78d008fffc1656849 (diff) | |
| download | linux-129dd323ddb808ee2fbd9f2a89d97d2cc7959790.tar.xz | |
powerpc/mm: enable the use of page table cache of order 0
hugepages uses a cache of order 0. Lets allow page tables
of order 0 in the common part in order to avoid open coding
in hugetlb
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include/asm/nohash/64/pgalloc.h')
| -rw-r--r-- | arch/powerpc/include/asm/nohash/64/pgalloc.h | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/arch/powerpc/include/asm/nohash/64/pgalloc.h b/arch/powerpc/include/asm/nohash/64/pgalloc.h index e2d62d033708..e95eb499a174 100644 --- a/arch/powerpc/include/asm/nohash/64/pgalloc.h +++ b/arch/powerpc/include/asm/nohash/64/pgalloc.h @@ -36,10 +36,7 @@ extern struct vmemmap_backing *vmemmap_list; #define MAX_PGTABLE_INDEX_SIZE 0xf extern struct kmem_cache *pgtable_cache[]; -#define PGT_CACHE(shift) ({ \ - BUG_ON(!(shift)); \ - pgtable_cache[(shift) - 1]; \ - }) +#define PGT_CACHE(shift) pgtable_cache[shift] static inline pgd_t *pgd_alloc(struct mm_struct *mm) { |