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authorMichael Ellerman <mpe@ellerman.id.au>2014-07-10 06:29:20 +0400
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2014-07-28 08:10:23 +0400
commit13b3d13b813ab834fac67dc05f8b86dbcc29c134 (patch)
treeeb13d92d8920a73e5152be63cd4fb5622e65e3ad /arch/powerpc/include/asm/mmu.h
parent376af5947c0e441ccbf98f0212d4ffbf171528f6 (diff)
downloadlinux-13b3d13b813ab834fac67dc05f8b86dbcc29c134.tar.xz
powerpc: Remove MMU_FTR_SLB
We now only support cpus that use an SLB, so we don't need an MMU feature to indicate that. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/mmu.h')
-rw-r--r--arch/powerpc/include/asm/mmu.h8
1 files changed, 2 insertions, 6 deletions
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index e61f24ed4e65..3d5abfe6ba67 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -64,9 +64,9 @@
*/
#define MMU_FTR_USE_PAIRED_MAS ASM_CONST(0x01000000)
-/* MMU is SLB-based
+/* Doesn't support the B bit (1T segment) in SLBIE
*/
-#define MMU_FTR_SLB ASM_CONST(0x02000000)
+#define MMU_FTR_NO_SLBIE_B ASM_CONST(0x02000000)
/* Support 16M large pages
*/
@@ -88,10 +88,6 @@
*/
#define MMU_FTR_1T_SEGMENT ASM_CONST(0x40000000)
-/* Doesn't support the B bit (1T segment) in SLBIE
- */
-#define MMU_FTR_NO_SLBIE_B ASM_CONST(0x80000000)
-
/* MMU feature bit sets for various CPUs */
#define MMU_FTRS_DEFAULT_HPTE_ARCH_V2 \
MMU_FTR_HPTE_TABLE | MMU_FTR_PPCAS_ARCH_V2