diff options
| author | Chris Packham <chris.packham@alliedtelesis.co.nz> | 2017-02-02 02:16:24 +0300 |
|---|---|---|
| committer | Borislav Petkov <bp@suse.de> | 2017-02-03 12:36:35 +0300 |
| commit | 321d17c19bf51a5e0ea19163f7091563c70415a6 (patch) | |
| tree | 21ce4d73c1f98130446d1f9743187d934753aa22 /arch/powerpc/boot/dts | |
| parent | 1bd9900b8301fc505f032c90ea487824cf824e99 (diff) | |
| download | linux-321d17c19bf51a5e0ea19163f7091563c70415a6.tar.xz | |
EDAC, mpc85xx: Add T2080 l2-cache support
The L2 cache controller on the T2080 SoC has similar capabilities to the
others already supported by the mpc85xx_edac driver. Add it to the list
of compatible devices.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Johannes Thumshirn <jth@kernel.org>
Acked-by: Michael Ellerman <mpe@ellerman.id.au>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: devicetree@vger.kernel.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/20170201231624.28843-1-chris.packham@alliedtelesis.co.nz
Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'arch/powerpc/boot/dts')
| -rw-r--r-- | arch/powerpc/boot/dts/fsl/t2081si-post.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi index c744569a20e1..a97296c64eb2 100644 --- a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi @@ -678,5 +678,6 @@ compatible = "fsl,t2080-l2-cache-controller"; reg = <0xc20000 0x40000>; next-level-cache = <&cpc>; + interrupts = <16 2 1 9>; }; }; |