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author | Emil Medve <Emilian.Medve@freescale.com> | 2014-11-06 18:48:11 +0300 |
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committer | Scott Wood <scottwood@freescale.com> | 2014-11-08 03:10:49 +0300 |
commit | eaffcb0f1bebbcfd38ecc9bdca105f7123115ab1 (patch) | |
tree | 8e22a3d46426eb5b601e74a72bc16f0c55691bc0 /arch/powerpc/boot/dts/fsl/t4240si-post.dtsi | |
parent | 94701fcb2f085cef29b29051f21de7fc3718217a (diff) | |
download | linux-eaffcb0f1bebbcfd38ecc9bdca105f7123115ab1.tar.xz |
powerpc/dts: Factorize the clock control node
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Change-Id: I25ce24a25862b4ca460164159867abefe00ccdd1
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/boot/dts/fsl/t4240si-post.dtsi')
-rw-r--r-- | arch/powerpc/boot/dts/fsl/t4240si-post.dtsi | 29 |
1 files changed, 2 insertions, 27 deletions
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi index 7e2fc7cdce48..0e96fcabe812 100644 --- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi @@ -368,34 +368,9 @@ fsl,liodn-bits = <12>; }; - clockgen: global-utilities@e1000 { +/include/ "qoriq-clockgen2.dtsi" + global-utilities@e1000 { compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2.0"; - ranges = <0x0 0xe1000 0x1000>; - reg = <0xe1000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - - sysclk: sysclk { - #clock-cells = <0>; - compatible = "fsl,qoriq-sysclk-2.0"; - clock-output-names = "sysclk"; - }; - - pll0: pll0@800 { - #clock-cells = <1>; - reg = <0x800 0x4>; - compatible = "fsl,qoriq-core-pll-2.0"; - clocks = <&sysclk>; - clock-output-names = "pll0", "pll0-div2", "pll0-div4"; - }; - - pll1: pll1@820 { - #clock-cells = <1>; - reg = <0x820 0x4>; - compatible = "fsl,qoriq-core-pll-2.0"; - clocks = <&sysclk>; - clock-output-names = "pll1", "pll1-div2", "pll1-div4"; - }; pll2: pll2@840 { #clock-cells = <1>; |