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| author | Kumar Gala <galak@kernel.crashing.org> | 2011-11-04 01:16:07 +0400 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-11-24 12:01:36 +0400 |
| commit | 2e8685a491c1063a4126598b10ecb78d1d20f537 (patch) | |
| tree | 2fbdb0c57360ca7864daa32febbf4cc7b4023489 /arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi | |
| parent | 56525200009d79a1a2449015276dcb10b4ecbae6 (diff) | |
| download | linux-2e8685a491c1063a4126598b10ecb78d1d20f537.tar.xz | |
powerpc/85xx: Rework MPC8536DS device trees
Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.
Other changes include:
* Moved to specifying interrupt-parent for mpic at root
* Moved to 4-cell mpic interrupt cells to support MPIC timers
* Added localbus node, but no chipselect details at this point
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
* and moved
PCI device IRQs down to virtual bridge level
* Moved mdio nodes up one level instead of under tsec nodes
* Added GPIO controller node to MPC8536 SoC template
[ marked as MPC8572 compatiable to get errata handling that applies ]
* Added missing cache-line-size & cache-size properties missing from
L2-cache node
* Added IP level IEEE 1588 / ptp timer node
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/boot/dts/fsl/mpc8544si-post.dtsi')
0 files changed, 0 insertions, 0 deletions