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| author | Yangbo Lu <yangbo.lu@freescale.com> | 2015-07-29 10:12:38 +0300 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2015-10-17 02:45:11 +0300 |
| commit | 07e9117e43fc5a25787379be011e36d0980f3135 (patch) | |
| tree | f838eec846a5ca0d3d668dd4dc2d0fd19580e7ea /arch/powerpc/boot/dts/bsc9131rdb.dtsi | |
| parent | 881ea7d3f55bf7b8834c81d86c4dcb3d5f786f15 (diff) | |
| download | linux-07e9117e43fc5a25787379be011e36d0980f3135.tar.xz | |
powerpc/dts: Add and fix 1588 timer node for eTSEC
Add 1588 timer node in files:
arch/powerpc/boot/dts/bsc9131rdb.dtsi
arch/powerpc/boot/dts/bsc9132qds.dtsi
arch/powerpc/boot/dts/p1010rdb.dtsi
arch/powerpc/boot/dts/p1020rdb-pd.dts
arch/powerpc/boot/dts/p1021rdb-pc.dtsi
arch/powerpc/boot/dts/p1022ds.dtsi
arch/powerpc/boot/dts/p1025twr.dtsi
For P2020RDB-PC, registers' values should be calculated
based on default 1588 reference clock(300MHz) not 250MHz,
and fix this in file:
arch/powerpc/boot/dts/p2020rdb-pc.dtsi
Signed-off-by: Yangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/boot/dts/bsc9131rdb.dtsi')
| -rw-r--r-- | arch/powerpc/boot/dts/bsc9131rdb.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/bsc9131rdb.dtsi b/arch/powerpc/boot/dts/bsc9131rdb.dtsi index 45efcbadb23c..f4d96d277ed5 100644 --- a/arch/powerpc/boot/dts/bsc9131rdb.dtsi +++ b/arch/powerpc/boot/dts/bsc9131rdb.dtsi @@ -80,6 +80,18 @@ status = "disabled"; }; + ptp_clock@b0e00 { + compatible = "fsl,etsec-ptp"; + reg = <0xb0e00 0xb0>; + interrupts = <68 2 0 0 69 2 0 0>; + fsl,tclk-period = <5>; + fsl,tmr-prsc = <2>; + fsl,tmr-add = <0xcccccccd>; + fsl,tmr-fiper1 = <999999995>; + fsl,tmr-fiper2 = <99990>; + fsl,max-adj = <249999999>; + }; + enet0: ethernet@b0000 { phy-handle = <&phy0>; phy-connection-type = "rgmii-id"; |