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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2016-01-18 00:20:54 +0300 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-01-18 00:20:54 +0300 |
| commit | a4eff16c54886c11972d6396ce8447b99e097343 (patch) | |
| tree | eae80ceb9c2827946f31e4bddc6f9c3a9da7b17a /arch/parisc/include/uapi | |
| parent | 0cbeafb245ca568bc0765645aa64f0451b716657 (diff) | |
| parent | b0e551313ebde17764f3a5ed273df524d1e7e690 (diff) | |
| download | linux-a4eff16c54886c11972d6396ce8447b99e097343.tar.xz | |
Merge branch 'parisc-4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
Pull parsic updates from Helge Deller:
"This patchset includes two major fixes which are both scheduled for
stable:
First, __ARCH_SI_PREAMBLE_SIZE was defined with a wrong value.
Second, huge page pte and TLB changes needed protection with a
spinlock. Other than that there are just some trivial optimizations
and cleanups"
* 'parisc-4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
parisc: Protect huge page pte changes with spinlocks
parisc: Imporove debug info about space registers and TLB configuration
parisc: Drop parisc-specific NSIGTRAP define
parisc: Fix __ARCH_SI_PREAMBLE_SIZE
parisc: Reduce overhead of parisc_requires_coherency()
parisc: Initialize PCI bridge cache line and default latency
Diffstat (limited to 'arch/parisc/include/uapi')
| -rw-r--r-- | arch/parisc/include/uapi/asm/siginfo.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/parisc/include/uapi/asm/siginfo.h b/arch/parisc/include/uapi/asm/siginfo.h index d7034728f377..8fd10f85c50e 100644 --- a/arch/parisc/include/uapi/asm/siginfo.h +++ b/arch/parisc/include/uapi/asm/siginfo.h @@ -1,9 +1,10 @@ #ifndef _PARISC_SIGINFO_H #define _PARISC_SIGINFO_H -#include <asm-generic/siginfo.h> +#if defined(__LP64__) +#define __ARCH_SI_PREAMBLE_SIZE (4 * sizeof(int)) +#endif -#undef NSIGTRAP -#define NSIGTRAP 4 +#include <asm-generic/siginfo.h> #endif |