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author | Linus Torvalds <torvalds@linux-foundation.org> | 2016-01-18 00:20:54 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2016-01-18 00:20:54 +0300 |
commit | a4eff16c54886c11972d6396ce8447b99e097343 (patch) | |
tree | eae80ceb9c2827946f31e4bddc6f9c3a9da7b17a /arch/parisc/include/asm/processor.h | |
parent | 0cbeafb245ca568bc0765645aa64f0451b716657 (diff) | |
parent | b0e551313ebde17764f3a5ed273df524d1e7e690 (diff) | |
download | linux-a4eff16c54886c11972d6396ce8447b99e097343.tar.xz |
Merge branch 'parisc-4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux
Pull parsic updates from Helge Deller:
"This patchset includes two major fixes which are both scheduled for
stable:
First, __ARCH_SI_PREAMBLE_SIZE was defined with a wrong value.
Second, huge page pte and TLB changes needed protection with a
spinlock. Other than that there are just some trivial optimizations
and cleanups"
* 'parisc-4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux:
parisc: Protect huge page pte changes with spinlocks
parisc: Imporove debug info about space registers and TLB configuration
parisc: Drop parisc-specific NSIGTRAP define
parisc: Fix __ARCH_SI_PREAMBLE_SIZE
parisc: Reduce overhead of parisc_requires_coherency()
parisc: Initialize PCI bridge cache line and default latency
Diffstat (limited to 'arch/parisc/include/asm/processor.h')
-rw-r--r-- | arch/parisc/include/asm/processor.h | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/arch/parisc/include/asm/processor.h b/arch/parisc/include/asm/processor.h index 7e759ecb1343..2e674e13e005 100644 --- a/arch/parisc/include/asm/processor.h +++ b/arch/parisc/include/asm/processor.h @@ -311,18 +311,17 @@ extern unsigned long get_wchan(struct task_struct *p); #define cpu_relax() barrier() #define cpu_relax_lowlatency() cpu_relax() -/* Used as a macro to identify the combined VIPT/PIPT cached - * CPUs which require a guarantee of coherency (no inequivalent - * aliases with different data, whether clean or not) to operate */ -static inline int parisc_requires_coherency(void) -{ +/* + * parisc_requires_coherency() is used to identify the combined VIPT/PIPT + * cached CPUs which require a guarantee of coherency (no inequivalent aliases + * with different data, whether clean or not) to operate + */ #ifdef CONFIG_PA8X00 - return (boot_cpu_data.cpu_type == mako) || - (boot_cpu_data.cpu_type == mako2); +extern int _parisc_requires_coherency; +#define parisc_requires_coherency() _parisc_requires_coherency #else - return 0; +#define parisc_requires_coherency() (0) #endif -} #endif /* __ASSEMBLY__ */ |