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authorAndrew Bresticker <abrestic@chromium.org>2014-10-20 23:03:58 +0400
committerRalf Baechle <ralf@linux-mips.org>2014-11-24 09:45:14 +0300
commitfa5635a277171021d364f6a3fab4addce8f358d2 (patch)
tree9fff06b8d87eba632d5abc5346733cd01b368658 /arch/mips
parent53a7bc815a139a524f1d60c32b70455f02b87a6d (diff)
downloadlinux-fa5635a277171021d364f6a3fab4addce8f358d2.tar.xz
MIPS: Move GIC clocksource driver to drivers/clocksource/
Move the GIC clocksource driver to drivers/clocksource/mips-gic-timer.c. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8133/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/Kconfig8
-rw-r--r--arch/mips/kernel/Makefile1
-rw-r--r--arch/mips/kernel/csrc-gic.c32
-rw-r--r--arch/mips/mti-malta/malta-time.c2
4 files changed, 3 insertions, 40 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 3afb795c0125..5b690cf0fec7 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -342,7 +342,7 @@ config MIPS_MALTA
select BOOT_RAW
select CEVT_R4K
select CSRC_R4K
- select CSRC_GIC
+ select CLKSRC_MIPS_GIC
select DMA_MAYBE_COHERENT
select GENERIC_ISA_DMA
select HAVE_PCSPKR_PLATFORM
@@ -385,7 +385,7 @@ config MIPS_SEAD3
select BUILTIN_DTB
select CEVT_R4K
select CSRC_R4K
- select CSRC_GIC
+ select CLKSRC_MIPS_GIC
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_IRQ_EI
select DMA_NONCOHERENT
@@ -954,10 +954,6 @@ config CSRC_IOASIC
config CSRC_R4K
bool
-config CSRC_GIC
- select MIPS_CM
- bool
-
config CSRC_SB1250
bool
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 0945d804ec3a..1aedbf5e4232 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -24,7 +24,6 @@ obj-$(CONFIG_CEVT_GT641XX) += cevt-gt641xx.o
obj-$(CONFIG_CEVT_SB1250) += cevt-sb1250.o
obj-$(CONFIG_CEVT_TXX9) += cevt-txx9.o
obj-$(CONFIG_CSRC_BCM1480) += csrc-bcm1480.o
-obj-$(CONFIG_CSRC_GIC) += csrc-gic.o
obj-$(CONFIG_CSRC_IOASIC) += csrc-ioasic.o
obj-$(CONFIG_CSRC_R4K) += csrc-r4k.o
obj-$(CONFIG_CSRC_SB1250) += csrc-sb1250.o
diff --git a/arch/mips/kernel/csrc-gic.c b/arch/mips/kernel/csrc-gic.c
deleted file mode 100644
index 0bf28e6aca7a..000000000000
--- a/arch/mips/kernel/csrc-gic.c
+++ /dev/null
@@ -1,32 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
- */
-#include <linux/init.h>
-#include <linux/irqchip/mips-gic.h>
-#include <linux/time.h>
-
-static cycle_t gic_hpt_read(struct clocksource *cs)
-{
- return gic_read_count();
-}
-
-static struct clocksource gic_clocksource = {
- .name = "GIC",
- .read = gic_hpt_read,
- .flags = CLOCK_SOURCE_IS_CONTINUOUS,
-};
-
-void __init gic_clocksource_init(unsigned int frequency)
-{
- /* Set clocksource mask. */
- gic_clocksource.mask = CLOCKSOURCE_MASK(gic_get_count_width());
-
- /* Calculate a somewhat reasonable rating value. */
- gic_clocksource.rating = 200 + frequency / 10000000;
-
- clocksource_register_hz(&gic_clocksource, frequency);
-}
diff --git a/arch/mips/mti-malta/malta-time.c b/arch/mips/mti-malta/malta-time.c
index 608655f8e6dd..028fae077001 100644
--- a/arch/mips/mti-malta/malta-time.c
+++ b/arch/mips/mti-malta/malta-time.c
@@ -183,7 +183,7 @@ void __init plat_time_init(void)
freq = freqround(gic_frequency, 5000);
printk("GIC frequency %d.%02d MHz\n", freq/1000000,
(freq%1000000)*100/1000000);
-#ifdef CONFIG_CSRC_GIC
+#ifdef CONFIG_CLKSRC_MIPS_GIC
gic_clocksource_init(gic_frequency);
#endif
}