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authorJaedon Shin <jaedon.shin@gmail.com>2016-08-19 05:52:28 +0300
committerRalf Baechle <ralf@linux-mips.org>2016-10-06 18:31:02 +0300
commitb2420e2762e36ec3aab0c0b6b9ee277f7b1b48e2 (patch)
tree3f7251432bbbcac80c6bb0c9653c44a35fab4a4b /arch/mips
parentc707844d4b876f74f2adf036f98f6787d76d2905 (diff)
downloadlinux-b2420e2762e36ec3aab0c0b6b9ee277f7b1b48e2.tar.xz
MIPS: BMIPS: Add support SDHCI device nodes
Adds SDHCI device nodes to BCM7xxx MIPS based SoCs. Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Cc: Jonas Gorski <jonas.gorski@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: MIPS Mailing List <linux-mips@linux-mips.org> Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14002/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips')
-rw-r--r--arch/mips/boot/dts/brcm/bcm7346.dtsi8
-rw-r--r--arch/mips/boot/dts/brcm/bcm7360.dtsi8
-rw-r--r--arch/mips/boot/dts/brcm/bcm7362.dtsi8
-rw-r--r--arch/mips/boot/dts/brcm/bcm7425.dtsi20
-rw-r--r--arch/mips/boot/dts/brcm/bcm7435.dtsi20
-rw-r--r--arch/mips/boot/dts/brcm/bcm97346dbsmb.dts4
-rw-r--r--arch/mips/boot/dts/brcm/bcm97360svmb.dts4
-rw-r--r--arch/mips/boot/dts/brcm/bcm97362svmb.dts4
-rw-r--r--arch/mips/boot/dts/brcm/bcm97425svmb.dts8
-rw-r--r--arch/mips/boot/dts/brcm/bcm97435svmb.dts8
10 files changed, 92 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
index 0105e4e5130b..0da4f8a3744b 100644
--- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
@@ -411,5 +411,13 @@
#phy-cells = <0>;
};
};
+
+ sdhci0: sdhci@413500 {
+ compatible = "brcm,bcm7425-sdhci";
+ reg = <0x413500 0x100>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <85>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
index f0f63cb2bd2b..9f72d3490427 100644
--- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
@@ -330,5 +330,13 @@
#phy-cells = <0>;
};
};
+
+ sdhci0: sdhci@410000 {
+ compatible = "brcm,bcm7425-sdhci";
+ reg = <0x410000 0x100>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <82>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
index ac42b98e31bb..ff734f45df92 100644
--- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
@@ -326,5 +326,13 @@
#phy-cells = <0>;
};
};
+
+ sdhci0: sdhci@410000 {
+ compatible = "brcm,bcm7425-sdhci";
+ reg = <0x410000 0x100>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <82>;
+ status = "disabled";
+ };
};
};
diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
index 8b05b98f2a9c..1c8d3b4033a0 100644
--- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
@@ -410,5 +410,25 @@
#phy-cells = <0>;
};
};
+
+ sdhci0: sdhci@419000 {
+ compatible = "brcm,bcm7425-sdhci";
+ reg = <0x419000 0x100>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <43>;
+ sd-uhs-sdr50;
+ mmc-hs200-1_8v;
+ status = "disabled";
+ };
+
+ sdhci1: sdhci@419200 {
+ compatible = "brcm,bcm7425-sdhci";
+ reg = <0x419200 0x100>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <44>;
+ sd-uhs-sdr50;
+ mmc-hs200-1_8v;
+ status = "disabled";
+ };
};
};
diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
index b7bb1024089c..2b28d91762ef 100644
--- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
@@ -425,5 +425,25 @@
#phy-cells = <0>;
};
};
+
+ sdhci0: sdhci@41a000 {
+ compatible = "brcm,bcm7425-sdhci";
+ reg = <0x41a000 0x100>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <47>;
+ sd-uhs-sdr50;
+ mmc-hs200-1_8v;
+ status = "disabled";
+ };
+
+ sdhci1: sdhci@41a200 {
+ compatible = "brcm,bcm7425-sdhci";
+ reg = <0x41a200 0x100>;
+ interrupt-parent = <&periph_intc>;
+ interrupts = <48>;
+ sd-uhs-sdr50;
+ mmc-hs200-1_8v;
+ status = "disabled";
+ };
};
};
diff --git a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
index 2c55ab094a29..27c9f127a7ca 100644
--- a/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97346dbsmb.dts
@@ -100,3 +100,7 @@
&sata_phy {
status = "okay";
};
+
+&sdhci0 {
+ status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97360svmb.dts b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
index 496e6ed9fae3..bed821b03013 100644
--- a/arch/mips/boot/dts/brcm/bcm97360svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97360svmb.dts
@@ -68,3 +68,7 @@
&sata_phy {
status = "okay";
};
+
+&sdhci0 {
+ status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97362svmb.dts b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
index b880c018f3d8..1b9bc4b2d9ae 100644
--- a/arch/mips/boot/dts/brcm/bcm97362svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97362svmb.dts
@@ -64,3 +64,7 @@
&sata_phy {
status = "okay";
};
+
+&sdhci0 {
+ status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97425svmb.dts b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
index f091e91b11c5..1c6b74daef56 100644
--- a/arch/mips/boot/dts/brcm/bcm97425svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97425svmb.dts
@@ -94,3 +94,11 @@
&ohci3 {
status = "okay";
};
+
+&sdhci0 {
+ status = "okay";
+};
+
+&sdhci1 {
+ status = "okay";
+};
diff --git a/arch/mips/boot/dts/brcm/bcm97435svmb.dts b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
index 9db84f2a6664..64bb1988dbc8 100644
--- a/arch/mips/boot/dts/brcm/bcm97435svmb.dts
+++ b/arch/mips/boot/dts/brcm/bcm97435svmb.dts
@@ -102,3 +102,11 @@
&sata_phy {
status = "okay";
};
+
+&sdhci0 {
+ status = "okay";
+};
+
+&sdhci1 {
+ status = "okay";
+};