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author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-06-10 05:10:34 +0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-06-10 05:10:34 +0400 |
commit | 82abb273d838318424644d8f02825db0fbbd400a (patch) | |
tree | e1ea8a92db4ba68f347249986ffe3a25ffbf8219 /arch/mips/sibyte | |
parent | 9b651cc2277b5e4883012ebab0fea2bcda4cbafa (diff) | |
parent | f8647b506d7116a1a3accd8d618184096e85f50b (diff) | |
download | linux-82abb273d838318424644d8f02825db0fbbd400a.tar.xz |
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
- three fixes for 3.15 that didn't make it in time
- limited Octeon 3 support.
- paravirtualization support
- improvment to platform support for Netlogix SOCs.
- add support for powering down the Malta eval board in software
- add many instructions to the in-kernel microassembler.
- add support for the BPF JIT.
- minor cleanups of the BCM47xx code.
- large cleanup of math emu code resulting in significant code size
reduction, better readability of the code and more accurate
emulation.
- improvments to the MIPS CPS code.
- support C3 power status for the R4k count/compare clock device.
- improvments to the GIO support for older SGI workstations.
- increase number of supported CPUs to 256; this can be reached on
certain embedded multithreaded ccNUMA configurations.
- various small cleanups, updates and fixes
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (173 commits)
MIPS: IP22/IP28: Improve GIO support
MIPS: Octeon: Add twsi interrupt initialization for OCTEON 3XXX, 5XXX, 63XX
DEC: Document the R4k MB ASIC mini interrupt controller
DEC: Add self as the maintainer
MIPS: Add microMIPS MSA support.
MIPS: Replace calls to obsolete strict_strto call with kstrto* equivalents.
MIPS: Replace obsolete strict_strto call with kstrto
MIPS: BFP: Simplify code slightly.
MIPS: Call find_vma with the mmap_sem held
MIPS: Fix 'write_msa_##' inline macro.
MIPS: Fix MSA toolchain support detection.
mips: Update the email address of Geert Uytterhoeven
MIPS: Add minimal defconfig for mips_paravirt
MIPS: Enable build for new system 'paravirt'
MIPS: paravirt: Add pci controller for virtio
MIPS: Add code for new system 'paravirt'
MIPS: Add functions for hypervisor call
MIPS: OCTEON: Add OCTEON3 to __get_cpu_type
MIPS: Add function get_ebase_cpunum
MIPS: Add minimal support for OCTEON3 to c-r4k.c
...
Diffstat (limited to 'arch/mips/sibyte')
-rw-r--r-- | arch/mips/sibyte/bcm1480/irq.c | 11 | ||||
-rw-r--r-- | arch/mips/sibyte/bcm1480/smp.c | 8 | ||||
-rw-r--r-- | arch/mips/sibyte/sb1250/smp.c | 8 |
3 files changed, 0 insertions, 27 deletions
diff --git a/arch/mips/sibyte/bcm1480/irq.c b/arch/mips/sibyte/bcm1480/irq.c index 59cfe2659771..373fbbc8425c 100644 --- a/arch/mips/sibyte/bcm1480/irq.c +++ b/arch/mips/sibyte/bcm1480/irq.c @@ -347,19 +347,8 @@ asmlinkage void plat_irq_dispatch(void) unsigned int cpu = smp_processor_id(); unsigned int pending; -#ifdef CONFIG_SIBYTE_BCM1480_PROF - /* Set compare to count to silence count/compare timer interrupts */ - write_c0_compare(read_c0_count()); -#endif - pending = read_c0_cause() & read_c0_status(); -#ifdef CONFIG_SIBYTE_BCM1480_PROF - if (pending & CAUSEF_IP7) /* Cpu performance counter interrupt */ - sbprof_cpu_intr(); - else -#endif - if (pending & CAUSEF_IP4) do_IRQ(K_BCM1480_INT_TIMER_0 + cpu); #ifdef CONFIG_SMP diff --git a/arch/mips/sibyte/bcm1480/smp.c b/arch/mips/sibyte/bcm1480/smp.c index 70d9182b26f1..af7d44edd9a8 100644 --- a/arch/mips/sibyte/bcm1480/smp.c +++ b/arch/mips/sibyte/bcm1480/smp.c @@ -115,13 +115,6 @@ static void bcm1480_smp_finish(void) } /* - * Final cleanup after all secondaries booted - */ -static void bcm1480_cpus_done(void) -{ -} - -/* * Setup the PC, SP, and GP of a secondary processor and start it * running! */ @@ -170,7 +163,6 @@ struct plat_smp_ops bcm1480_smp_ops = { .send_ipi_mask = bcm1480_send_ipi_mask, .init_secondary = bcm1480_init_secondary, .smp_finish = bcm1480_smp_finish, - .cpus_done = bcm1480_cpus_done, .boot_secondary = bcm1480_boot_secondary, .smp_setup = bcm1480_smp_setup, .prepare_cpus = bcm1480_prepare_cpus, diff --git a/arch/mips/sibyte/sb1250/smp.c b/arch/mips/sibyte/sb1250/smp.c index db976117dd4d..c0c4b3f88a08 100644 --- a/arch/mips/sibyte/sb1250/smp.c +++ b/arch/mips/sibyte/sb1250/smp.c @@ -103,13 +103,6 @@ static void sb1250_smp_finish(void) } /* - * Final cleanup after all secondaries booted - */ -static void sb1250_cpus_done(void) -{ -} - -/* * Setup the PC, SP, and GP of a secondary processor and start it * running! */ @@ -158,7 +151,6 @@ struct plat_smp_ops sb_smp_ops = { .send_ipi_mask = sb1250_send_ipi_mask, .init_secondary = sb1250_init_secondary, .smp_finish = sb1250_smp_finish, - .cpus_done = sb1250_cpus_done, .boot_secondary = sb1250_boot_secondary, .smp_setup = sb1250_smp_setup, .prepare_cpus = sb1250_prepare_cpus, |