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authorSteven J. Hill <Steven.Hill@imgtec.com>2013-11-14 20:12:24 +0400
committerRalf Baechle <ralf@linux-mips.org>2014-01-22 23:18:58 +0400
commit4a0156fbfb78b8006ce9b2ffac9383b7d4a8192b (patch)
tree316ae10e4705f42a0690d44254be218c4bedbc03 /arch/mips/pmcs-msp71xx/msp_smp.c
parent1745c1ef88c095a99c95d13b275774d18774465d (diff)
downloadlinux-4a0156fbfb78b8006ce9b2ffac9383b7d4a8192b.tar.xz
MIPS: features: Add initial support for Segmentation Control registers
MIPS32R3 introduced a new set of Segmentation Control registers which increase the flexibility of the segmented-based memory scheme. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6131/
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