diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2006-04-03 20:56:36 +0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-04-19 06:14:21 +0400 |
| commit | e4ac58afdfac792c0583af30dbd9eae53e24c78b (patch) | |
| tree | 7517bef2c515fc630e4d3d238867b91cde96f558 /arch/mips/philips/pnx8550/common/int.c | |
| parent | d35d473c25d43d7db3e5e18b66d558d2a631cca8 (diff) | |
| download | linux-e4ac58afdfac792c0583af30dbd9eae53e24c78b.tar.xz | |
[MIPS] Rewrite all the assembler interrupt handlers to C.
Saves like 1,600 lines of code, is way easier to debug, compilers
frequently do a better job than the cut and paste type of handlers many
boards had. And finally having all the stuff done in a single place
also means alot of bug potencial for the MT ASE is gone.
The only surviving handler in assembler is the DECstation one; I hope
Maciej will rewrite it.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/philips/pnx8550/common/int.c')
| -rw-r--r-- | arch/mips/philips/pnx8550/common/int.c | 23 |
1 files changed, 16 insertions, 7 deletions
diff --git a/arch/mips/philips/pnx8550/common/int.c b/arch/mips/philips/pnx8550/common/int.c index c500e2d41f2c..39ee6314f627 100644 --- a/arch/mips/philips/pnx8550/common/int.c +++ b/arch/mips/philips/pnx8550/common/int.c @@ -38,8 +38,6 @@ #include <int.h> #include <uart.h> -extern asmlinkage void cp0_irqdispatch(void); - static DEFINE_SPINLOCK(irq_lock); /* default prio for interrupts */ @@ -55,7 +53,7 @@ static char gic_prio[PNX8550_INT_GIC_TOTINT] = { 1 // 70 }; -void hw0_irqdispatch(int irq, struct pt_regs *regs) +static void hw0_irqdispatch(int irq, struct pt_regs *regs) { /* find out which interrupt */ irq = PNX8550_GIC_VECTOR_0 >> 3; @@ -68,7 +66,7 @@ void hw0_irqdispatch(int irq, struct pt_regs *regs) } -void timer_irqdispatch(int irq, struct pt_regs *regs) +static void timer_irqdispatch(int irq, struct pt_regs *regs) { irq = (0x01c0 & read_c0_config7()) >> 6; @@ -88,6 +86,20 @@ void timer_irqdispatch(int irq, struct pt_regs *regs) } } +asmlinkage void plat_irq_dispatch(struct pt_regs *regs) +{ + unsigned int pending = read_c0_status() & read_c0_cause(); + + if (pending & STATUSF_IP2) + do_IRQ(2, regs); + else if (pending & STATUSF_IP7) { + if (read_c0_config7() & 0x01c0) + timer_irqdispatch(7, regs); + } + + spurious_interrupt(regs); +} + static inline void modify_cp0_intmask(unsigned clr_mask, unsigned set_mask) { unsigned long status = read_c0_status(); @@ -223,9 +235,6 @@ void __init arch_init_irq(void) int i; int configPR; - /* init of cp0 interrupts */ - set_except_vector(0, cp0_irqdispatch); - for (i = 0; i < PNX8550_INT_CP0_TOTINT; i++) { irq_desc[i].handler = &level_irq_type; pnx8550_ack(i); /* mask the irq just in case */ |