summaryrefslogtreecommitdiff
path: root/arch/mips/mm/tlb-r4k.c
diff options
context:
space:
mode:
authorDavid S. Miller <davem@davemloft.net>2008-03-18 09:44:31 +0300
committerDavid S. Miller <davem@davemloft.net>2008-03-18 09:44:31 +0300
commit2f633928cbba8a5858bb39b11e7219a41b0fbef5 (patch)
tree9a82f4b7f2c3afe4b0208d8e44ea61bae90a7d22 /arch/mips/mm/tlb-r4k.c
parent5e226e4d9016daee170699f8a4188a5505021756 (diff)
parentbde4f8fa8db2abd5ac9c542d76012d0fedab050f (diff)
downloadlinux-2f633928cbba8a5858bb39b11e7219a41b0fbef5.tar.xz
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Diffstat (limited to 'arch/mips/mm/tlb-r4k.c')
-rw-r--r--arch/mips/mm/tlb-r4k.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index 74ae0348cc92..63065d6e8063 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -388,7 +388,7 @@ void __init add_wired_entry(unsigned long entrylo0, unsigned long entrylo1,
* lifetime of the system
*/
-static int temp_tlb_entry __initdata;
+static int temp_tlb_entry __cpuinitdata;
__init int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
unsigned long entryhi, unsigned long pagemask)
@@ -427,7 +427,7 @@ out:
return ret;
}
-static void __init probe_tlb(unsigned long config)
+static void __cpuinit probe_tlb(unsigned long config)
{
struct cpuinfo_mips *c = &current_cpu_data;
unsigned int reg;
@@ -455,7 +455,7 @@ static void __init probe_tlb(unsigned long config)
c->tlbsize = ((reg >> 25) & 0x3f) + 1;
}
-static int __initdata ntlb = 0;
+static int __cpuinitdata ntlb = 0;
static int __init set_ntlb(char *str)
{
get_option(&str, &ntlb);
@@ -464,7 +464,7 @@ static int __init set_ntlb(char *str)
__setup("ntlb=", set_ntlb);
-void __init tlb_init(void)
+void __cpuinit tlb_init(void)
{
unsigned int config = read_c0_config();
@@ -473,7 +473,7 @@ void __init tlb_init(void)
* - On R4600 1.7 the tlbp never hits for pages smaller than
* the value in the c0_pagemask register.
* - The entire mm handling assumes the c0_pagemask register to
- * be set for 4kb pages.
+ * be set to fixed-size pages.
*/
probe_tlb(config);
write_c0_pagemask(PM_DEFAULT_MASK);