diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2007-11-03 05:05:43 +0300 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-11-26 20:26:14 +0300 |
| commit | cce335ae47e231398269fb05fa48e0e9cbf289e0 (patch) | |
| tree | a01ea9ad318d459393a905df5c53b68b754300da /arch/mips/mm/dma-default.c | |
| parent | 940f6b48a130e0a33cb8bd397dd0e277166470ad (diff) | |
| download | linux-cce335ae47e231398269fb05fa48e0e9cbf289e0.tar.xz | |
[MIPS] 64-bit Sibyte kernels need DMA32.
Sibyte SOCs only have 32-bit PCI. Due to the sparse use of the address
space only the first 1GB of memory is mapped at physical addresses
below 1GB. If a system has more than 1GB of memory 32-bit DMA will
not be able to reach all of it.
For now this patch is good enough to keep Sibyte users happy but it seems
eventually something like swiotlb will be needed for Sibyte.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm/dma-default.c')
| -rw-r--r-- | arch/mips/mm/dma-default.c | 37 |
1 files changed, 28 insertions, 9 deletions
diff --git a/arch/mips/mm/dma-default.c b/arch/mips/mm/dma-default.c index 33519ce49540..ae76795685cc 100644 --- a/arch/mips/mm/dma-default.c +++ b/arch/mips/mm/dma-default.c @@ -40,16 +40,38 @@ static inline int cpu_is_noncoherent_r10000(struct device *dev) current_cpu_type() == CPU_R12000); } +static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp) +{ + /* ignore region specifiers */ + gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM); + +#ifdef CONFIG_ZONE_DMA32 + if (dev == NULL) + gfp |= __GFP_DMA; + else if (dev->coherent_dma_mask < DMA_BIT_MASK(24)) + gfp |= __GFP_DMA; + else +#endif +#ifdef CONFIG_ZONE_DMA32 + if (dev->coherent_dma_mask < DMA_BIT_MASK(32)) + gfp |= __GFP_DMA32; + else +#endif + ; + + /* Don't invoke OOM killer */ + gfp |= __GFP_NORETRY; + + return gfp; +} + void *dma_alloc_noncoherent(struct device *dev, size_t size, dma_addr_t * dma_handle, gfp_t gfp) { void *ret; - /* ignore region specifiers */ - gfp &= ~(__GFP_DMA | __GFP_HIGHMEM); + gfp = massage_gfp_flags(dev, gfp); - if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff)) - gfp |= GFP_DMA; ret = (void *) __get_free_pages(gfp, get_order(size)); if (ret != NULL) { @@ -67,11 +89,8 @@ void *dma_alloc_coherent(struct device *dev, size_t size, { void *ret; - /* ignore region specifiers */ - gfp &= ~(__GFP_DMA | __GFP_HIGHMEM); + gfp = massage_gfp_flags(dev, gfp); - if (dev == NULL || (dev->coherent_dma_mask < 0xffffffff)) - gfp |= GFP_DMA; ret = (void *) __get_free_pages(gfp, get_order(size)); if (ret) { @@ -343,7 +362,7 @@ int dma_supported(struct device *dev, u64 mask) * so we can't guarantee allocations that must be * within a tighter range than GFP_DMA.. */ - if (mask < 0x00ffffff) + if (mask < DMA_BIT_MASK(24)) return 0; return 1; |