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author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-06-21 01:40:52 +0400 |
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committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-06-21 01:40:52 +0400 |
commit | 044f620ac65d0d90727cdbd0c058e4d150d62ddc (patch) | |
tree | 89bcf2829803979ff8384d14c159daebabc3244d /arch/mips/mips-boards/sim | |
parent | c53ab5d56c66816fe06dc6cd0abb93f6dd81a145 (diff) | |
parent | 3b1d4ed5353af04d6aa20be2701727b9cdb2ac61 (diff) | |
download | linux-044f620ac65d0d90727cdbd0c058e4d150d62ddc.tar.xz |
Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus:
[MIPS] Don't drag a platform specific header into generic arch code.
Diffstat (limited to 'arch/mips/mips-boards/sim')
-rw-r--r-- | arch/mips/mips-boards/sim/sim_int.c | 2 | ||||
-rw-r--r-- | arch/mips/mips-boards/sim/sim_time.c | 8 |
2 files changed, 5 insertions, 5 deletions
diff --git a/arch/mips/mips-boards/sim/sim_int.c b/arch/mips/mips-boards/sim/sim_int.c index 15ac0655c1ff..766e0159ee5b 100644 --- a/arch/mips/mips-boards/sim/sim_int.c +++ b/arch/mips/mips-boards/sim/sim_int.c @@ -77,7 +77,7 @@ asmlinkage void plat_irq_dispatch(void) irq = irq_ffs(pending); if (irq > 0) - do_IRQ(MIPSCPU_INT_BASE + irq); + do_IRQ(MIPS_CPU_IRQ_BASE + irq); else spurious_interrupt(); } diff --git a/arch/mips/mips-boards/sim/sim_time.c b/arch/mips/mips-boards/sim/sim_time.c index d3a21c741514..7224ffe31d36 100644 --- a/arch/mips/mips-boards/sim/sim_time.c +++ b/arch/mips/mips-boards/sim/sim_time.c @@ -71,8 +71,8 @@ irqreturn_t sim_timer_interrupt(int irq, void *dev_id) int vpflags = dvpe(); write_c0_compare (read_c0_count() - 1); - clear_c0_cause(0x100 << MIPSCPU_INT_CPUCTR); - set_c0_status(0x100 << MIPSCPU_INT_CPUCTR); + clear_c0_cause(0x100 << cp0_compare_irq); + set_c0_status(0x100 << cp0_compare_irq); irq_enable_hazard(); evpe(vpflags); @@ -183,8 +183,8 @@ void __init plat_timer_setup(struct irqaction *irq) } else { if (cpu_has_vint) - set_vi_handler(MIPSCPU_INT_CPUCTR, mips_timer_dispatch); - mips_cpu_timer_irq = MIPSCPU_INT_BASE + MIPSCPU_INT_CPUCTR; + set_vi_handler(cp0_compare_irq, mips_timer_dispatch); + mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq; } /* we are using the cpu counter for timer interrupts */ |